Barco GRAPHICS 1209S, Руководство по обслуживанию

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Date : 10/02/98 R7621127
Sync+Vertical Deflection R7621127
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Technical description
Anyhow, the phase controlling voltage arrives at one base of the differential amplifier
Q17. The other transistor in Q17 receives the integrated pulses of pin 13. This DC
voltage is proportional with the width of the output pulses and the line period .
Assume we have set the phase voltage at 2 volts. The comparator will now adjusts
the width of the output pulses at pin 13 until both bases of Q2 carry the same 2 volts.
Therefore, the width of the pulses will be narrower when the line period decreases,
thus for the higher frequencies. Note that the width of this pulse here is the phase
delay time.
Indeed, the other one - shot now is triggered with the negative pulse of pin 4 on the
positive going transient.
The width of the horizontal drive pulse is tuned by R89 / C64.
The positive drive pulses at pin 5 are sent to the controller to lock the PLL of the
textgenerator. By using locking pulses which have undergone the phase shift, the
text on the screen is not affected by the phase control but fixed to the scanning.
The negative going pulses at pin 12 are slightly amplified and buffered with Q15,
buffered with Q16 and sent to the “UN HOR DEFL” module.
5. Adjustable blankings
a) Left / right blanking .
The Left/Right Blanking pulses are generated by two one-shots in IC413 which are
triggered with "L PULSE" (FlyBack pulses from the Hor Defl board).
BELLA potentiometers of IC402 is 0 -1.5 volts. This range should allow the same
relative blanking irrelevant the line period. Therefore, the absolute value must be
smaller at higher frequencies. A feedback system is used that automatically adapts
the width of the pulse to the line period (compare this with the phase alignment where
a similar problem is solved in a similar way).
Pulses, coinciding with the start of the flyback time, and, having a width set by C470/
Q412, exit at pin 13 of IC413. These pulses are integrated and the resulting voltage
is sent to pin 10 of IC408 to be compared with the voltage at pin 9 (=LEFT BL). The
OPAMP’s output is fed back to the input pin 2 with a Miller capacitor. The current of
Q412 is adapted until both voltages at the pins 2 and 3 are identical.
The "LEFT INV" is connected to the gating (adding) diode D430 or pin 1 of the NAND
gate IC415.
To generate the blanking pulse for the end of the scan, the inverted output at pin 12
is integrated and compared with the BELLA voltage RIGHT BL.
The pulses RIGHT INV are applied to the same NAND-gate input via D429.
b) Top / Bottom blanking
To achieve a high accuracy, or, in other words, to dispose of a steep ramp, the
sawtooth is sent into a “dead band response amplifier” built around the OPAMP 9 -
10 - 8 in IC409.
The sawtooth V SWT enters pin 9 capacitively. The output is inverted and the clipping
levels are set by clamping circuits : R465/D404/D405 and R483/D407/D406.
The modified waveform is now sent to two level detectors of IC412, on the inverting
and the non-inverting inputs. A potentiometer of the BELLA IC400 and another one
in IC401 adjust the DC levels of the other inputs.
The outputs are added and applied to the “Data” input of an RS-flipflop of IC411. The
clock input of this RS-FF are line pulses, the output is in this case always a multiple
The available range of the