Avnet COM Express MSC C10M-BT, Руководство пользователя

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MSC C10M-BT / MSC C10M-BTC User Manual
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System resources
PCI IRQ Routing
Interrupts of Controller
Slot Number
(or Onboard Device) IDSEL #
or
DEV/Fu
nction
B
us
#
P
IRQ
0
(INT
A
)
P
IRQ
1
(INT
B
)
P
IRQ
2
(INT
C)
P
IRQ
3
(INT
D)
P
IRQ
4
(INT
E
)
P
IRQ
5
(INT
F)
P
IRQ
6
(INT
G
)
P
IRQ
7
(INT
H)
Internal Graphic Device Dev 2h,
Func 0h 0 x
SDIO Port (not used) Dev 11h
Func 0h 0 x
SD-Card Dev 12h
Func 0h 0 x
SATA Dev 13h
Func 0h 0 x
USB xHCI Dev 14h
Func 0h 0 x
I²S Dev 15h
Func 0h 0 x
USB Client Dev 16h
Func 0h 0 x
eMMC 4.5 Port Dev 17h
Func 0h 0 x
I²C Port 1 Dev 18h
Func 1h 0 x
TXE (ME) Dev 1Ah
Func 0h 0 x
HD Audio Dev 1Bh
Func 0h 0 x
PCI Express Root Port 1 Dev
1Ch
Func 0h 0 x
PCI Express Root Port 2 Dev
1Ch
Func 1h 0 x
PCI Express Root Port 3 Dev
1Ch
Func 2h 0 x
PCI Express Root Port 4 Dev
1Ch
Func 3h 0 x
EHCI USB Dev
1Dh
Func 0h 0 x
SMBus Port Dev 1Fh
Func 3h 0 x
Gbit Lan Controller (
connected at PCIe Root Port 4
) Dev 0h
Func 0h x x
Note : x means that this Interrupt is used by an internal chipset device, e.g. the AMD Graphics Device is
connected to PIRQ1 and uses Interrupt A.
Chipset internal devices are connected to PIRQ0-3.
PIRQ4-7 are not shared with chipset devices.
Note : The assignment of the PCI Express slots to the COMExpress connector is 1:1.