AC4830xC-C Data Book
Chapter 3. Chip Data and Timing
Revision 1.0
37
March 2000
3.3.1.2 Memory Write
Figure
3-2: Memory Write Timing
R/W-
21
D15-D0
A15-A0
CLKOUT
MS-
24
27
23
28
29
26
30
31
33
22
25
32
Table
3-5: Memory Write Timing Requirements
Parameter (units ns)
Min
Max
(22) Delay time, address valid from CLKOUT high
-2*
3
(21) Delay time, address valid from CLKOUT low
-2*
3
(28) Delay time, MS- low from CLKOUT low
-1*
3
(24) Delay time, data valid from CLKOUT low
0*
6
(29) Delay time, MS- high from CLKOUT low
-1
3
(30) Delay time, R/W- low from CLKOUT high
-1
3
(33) Delay time, R/W- high from CLKOUT high
-1
3
(31) Delay time, MS- low after R/W- low *
H-2
H+1
(26) Hold time, write data valid after MS- high
H-3
H+6
I/O
(32) Pulse Duration, MS- low *
2H-2
(27) Setup time, address valid before MS- low
2H-2
(25) Setup time, write data valid before MS- high
2H-6
2H+5
I/O
(23) Hold Time, address valid after CLKOUT high
m
1
3
* Values derived from characterization data and not tested.
I/O
In the case of a Memory write preceded by an I/O cycle
M
In the case of a Memory write preceded by a Memory write
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