AT24C16C [DATASHEET]
Atmel-8719D-SEEPROM-AT24C16C-Datasheet_122016
10
The data word address lower four bits are internally incremented following the receipt of each data word. The
higher data word address bits are not incremented, retaining the memory page row location. When the word
address, internally generated, reaches the page boundary, the following byte is placed at the beginning of the
same page. If more than eight data words are transmitted to the EEPROM, the data word address will roll-over
and previous data will be overwritten.
Figure 8-2.
Page Write
Acknowledge Polling:
Once the internally timed write cycle has started and the EEPROM inputs are disabled,
Acknowledge Polling can be initiated. This involves sending a Start Condition followed by the device address
word. The Read/Write bit is representative of the operation desired. Only if the internal write cycle has
completed will the EEPROM respond with a zero allowing the Read or Write sequence to continue.
9.
Read Operations
Read operations are initiated in the same way as Write operations with the exception that the Read/Write select
bit in the device address word is set to one. There are three read operations:
Current Address Read
Random Address Read
Sequential Read
.
Current Address Read:
The internal data word address counter maintains the last address accessed during
the last Read or Write operation, incremented by one. This address stays valid between operations as long as
the chip power is maintained. The address roll-over during Read is from the last byte of the last memory page to
the first byte of the first page. The address roll-over during Write is from the last byte of the current page to the
first byte of the same page.
Once the device address with the Read/Write select bit set to one is clocked in and acknowledged by the
EEPROM, the current address data word is serially clocked out. The microcontroller does not respond with an
input zero but does generate a following Stop Condition (see
Figure 9-1
).
Figure 9-1.
Current Address Read
SDA Line
S
T
A
R
T
W
R
I
T
E
S
T
O
P
Device
Address
Word
Address (n)
Data (n)
Data (n + 1)
Data (n + x)
M
S
B
A
C
K
A
C
K
A
C
K
A
C
K
A
C
K
R
/
W
SDA Line
S
T
A
R
T
R
E
A
D
S
T
O
P
Device
Address
Data
M
S
B
A
C
K
N
O
A
C
K
R
/
W
