Publication No. 981049 Rev. B
PXIe-3352 User Manual
Astronics Test Systems
Overview and Features 1-5
External DC Power Supported
If the PXI mainframe is powered down, power may still be applied to the Rubidium
oscillator via a front panel external DC power input. This keeps the Rubidium
oscillator very stable over time and eliminates the effects of retrace. The GPS
receiver maintains its location information during power down, saving the time it
takes for the receiver to do a position fix, because it has an internal battery to
power its SRAM and real time clock.
Front Panel
Connectors:
Connector
Connector
Type
Reference
Designator
Description
Sine WAVE
OUT
SMA
J1
Rubidium Module Sine Wave Out
SQ WAVE
OUT
SMA
J2
Rubidium Module Square Wave Out
1PPS IN
SMA
J3
External 1 PPS Input
1PPS OUT
SMA
J4
1 PPS Output from Rubidium Module
GPS ANT
SMA
J5
External GPS Antenna Input
Ext PWR
DC Jack
2.5 mm ID
5.5 mm OD
J6
Ex12 VDC @1.5 A Center
Positive for Rubidium Module
LED Indicators
LED
Indication
FAIL
Unit failure
ACC
PXIe access
LOCK
Rubidium Module Output Frequency Locked