480
10.17.3. DisplayPort Unit (VM-1876A-M1)
The dot clock frequency is restricted by the pattern drawing bit length (Color Depth) and the dividing mode (Split
Count) as shown in the figure below. Data skipping occurs when the output video bit length (Video Width) at this
time is less than the pattern drawing bit length (Color Depth).
*
Refer to “10.2.6 Color Depth (level) setting of Pattern drawing” about Color depth.
* Refer to “10.4.3 DisplayPort Setting” about Video width.
* Maximum data amount (maximum value of Dot Clock) differs from the combination of Link Rate and Lane Count.
Refer to “10.12.4 DisplayPort Unit (VM-1876A-M1)” about
1) When Output Video Width is 6-bit.
This fugure indicates the max. value of dot clock when outputting one picture by using 2 connectors (split
drawing). The max. value of dot clock when outputting one picture by one connector is:
8-bit : 600MHz, 9/10-bit : 576MHz, 11/12-bit : 480MHz
Содержание VG-876
Страница 1: ...Video Signal Generator VG 876 Instruction Manual Ver 3 40 ...
Страница 2: ......
Страница 30: ...16 ...
Страница 57: ...Chapter 3 TIMING DATA SETTINGS 43 ...
Страница 103: ...Chapter 4 PATTERN SETTINGS 89 1 2 3 4 5 6 0 ...
Страница 134: ...120 GUI Display Selected port ...
Страница 135: ...Chapter 4 PATTERN SETTINGS 121 HEX Display Selected port ...
Страница 143: ...Chapter 4 PATTERN SETTINGS 129 ...
Страница 177: ...Chapter 6 HDCP SETTINGS AND EXECUTION 163 ...
Страница 205: ...Chapter 7 VG 876 SYSTEM SETTINGS 191 ...
Страница 223: ...Chapter 8 DATA COPYING ERASING 209 ...
Страница 237: ...Chapter 9 USEFUL FUNCTIONS 223 ...
Страница 312: ...298 Horizontally 2 split output Split Mode 0 2 select either one of them Data Transfer assignment Split Image ...
Страница 336: ...322 10 5 3 Data transfer method Normal MODE 2Lane output ...
Страница 338: ...324 Normal MODE 4Lane output ...
Страница 374: ...360 Assignment of each lane Lane 1 2 Lane 5 6 Lane 9 10 Lane 13 14 Lane 3 4 Lane 7 8 Lane 11 12 Lane 15 16 ...
Страница 376: ...362 Assignment of each lane ...
Страница 378: ...364 Assignment of each lane Lane 1 4 Lane 9 12 Lane 5 8 Lane 13 16 ...
Страница 380: ...366 Assignment of each lane Lane1 4 Lane9 12 Lane5 8 Lane 13 16 ...
Страница 382: ...368 Assignment of each lane Lane1 8 Lane9 16 ...
Страница 384: ...370 Assignment of each lane Lane1 8 Lane9 16 ...
Страница 386: ...372 Assignment of each lane Lane1 8 Lane9 16 ...
Страница 388: ...374 Assignment of each lane Lane1 4 Lane9 12 Lane5 8 Lane 13 16 ...
Страница 390: ...376 Assignment of each lane Lane1 4 Lane9 12 Lane5 8 Lane 13 16 ...
Страница 392: ...378 Assignment of each lane Lane1 16 ...
Страница 453: ...Chapter 10 INTERFACE SETTINGS 439 Connection figure of VM 1876 MX s ...
Страница 464: ...450 Reverse Mode Top Bottom Reverse Mode LR TB ...
Страница 465: ...Chapter 10 INTERFACE SETTINGS 451 Multi VGMode V4Div Vertical Split Reverse Mode No Reverse Reverse Mode Left Right ...
Страница 466: ...452 Reverse Mode Top Bottom Reverse Mode LR TB ...
Страница 467: ...Chapter 10 INTERFACE SETTINGS 453 Multi VGMode V2Div Vertically 2 split Reverse Mode No Reverse Reverse Mode Left Right ...
Страница 468: ...454 Reverse Mode Top Bottom Reverse Mode LR TB ...
Страница 495: ...Chapter 10 INTERFACE SETTINGS 481 2 When Video Width is 8 bit ...
Страница 496: ...482 3 When Video Width is 10 bit ...
Страница 501: ...Chapter 10 INTERFACE SETTINGS 487 2 When iTMDS output ...
Страница 504: ......
Страница 538: ...524 ...