CYC1000 User Guide
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January 2020
Board Reference
FPGA Pin No.
Description
I/O Standard
CLK
PIN_B14
SDRAM Input Clock
3.3 V
CKE
PIN_F8
SDRAM Clock Enable
3.3 V
DQ0
PIN_B10
SDRAM Data [0]
3.3 V
DQ1
PIN_A10
SDRAM Data [1]
3.3 V
DQ2
PIN_B11
SDRAM Data [2]
3.3 V
DQ3
PIN_A11
SDRAM Data [3]
3.3 V
DQ4
PIN_A12
SDRAM Data [4]
3.3 V
DQ5
PIN_D9
SDRAM Data [5]
3.3 V
DQ6
PIN_B12
SDRAM Data [6]
3.3 V
DQ7
PIN_C9
SDRAM Data [7]
3.3 V
DQ8
PIN_D11
SDRAM Data [8]
3.3 V
DQ9
PIN_E11
SDRAM Data [9]
3.3 V
DQ10
PIN_A15
SDRAM Data [10]
3.3 V
DQ11
PIN_E9
SDRAM Data [11]
3.3 V
DQ12
PIN_D14
SDRAM Data [12]
3.3 V
DQ13
PIN_F9
SDRAM Data [13]
3.3 V
DQ14
PIN_C14
SDRAM Data [14]
3.3 V
DQ15
PIN_A14
SDRAM Data [15]
3.3 V
DQM0
PIN_B13
SDRAM Lower Data Mask
3.3 V
DQM1
PIN_D12
SDRAM Upper Data Mask
3.3 V
3.3.5
Serial Configuration Flash Memory
The CYC1000 board supports up to 32MBit of serial flash memory that can be used for user data
and programming non-volatile storage. The configuration bit stream is downloaded into the serial
configuration device which automatically loads the configuration data into the Cyclone 10 LP
when the board is powered on. Device memory capacity not consumed storing configuration data
can be used as general-purpose non-volatile memory, which is perfect for program and data
storage. Several interface peripherals available with Nios II embedded processors allow you to
access the serial configuration device as a memory module connected to your embedded system.
Figure 9
–
Flash Connections
