Programmers Model
ARM DUI 0447J
Copyright © 2009-2014, ARM. All rights reserved.
4-10
ID052914
Non-Confidential
4.4
Register descriptions
This section describes Motherboard Express µATX registers.
Table 4-3 on page 4-8
provides
cross references to individual registers.
4.4.1
ID Register
The SYS_ID Register characteristics are:
Purpose
Identifies the board and FPGA.
Usage constraints
See
Table 4-4
.
Configurations
See
Table 4-4
.
Attributes
See
Table 4-3 on page 4-8
.
Figure 4-3
shows the bit assignments.
Figure 4-3 SYS_ID Register bit assignments
Table 4-4
shows the bit assignments. The register value depends on the image loaded into the
FPGA.
4.4.2
User Switch Register
The SYS_SW Register characteristics are:
Purpose
Reads the
USERSWITCH
entry in the
config.txt
file. A value of 1 indicates
that the switch is on.
Usage constraints
See
Table 4-5 on page 4-11
.
FPGA
Rev
31
28 27
16 15
12 11
8 7
0
HBI
Build
Arch
Table 4-4 SYS_ID Register bit assignments
Bits
Access
Name
Reset
Description
[31:28]
Read-write
Rev
0x1
Board revision:
0x0
Rev A.
0x1
Rev B.
0x2
Rev C.
0x3
Rev D.
[27:16]
Read-only
HBI
0x190
HBI board number in BCD
[15:12]
Read-only
Build
0xF
Build variant of board, from BOM:
0xF
All builds.
[11:8]
Read-only
Arch
0x5
Bus architecture:
0x4
AHB.
0x5
AXI.
[7:0]
Read-only
FPGA
0xXX
FPGA build, BCD coded
The actual value read depends on the FPGA build.