Application Notes
P44x/EN AP/E33
MiCOM P441/P442 & P444
Page 117/220
The check synchronising element provides two ‘output’ signals which feed into the manual
CB control and the auto reclose logic respectively. These signals allow reclosure provided
that the relevant check-synch criteria are fulfilled.
Note that if check-synchronising is disabled, the DDB:
signal is
automatically asserted and becomes invariant (logical status always forced at 1).
For an interconnected power system, tripping of one line should not cause a significant shift
in the phase relationship of the busbar and line side voltages. Parallel interconnections will
ensure that the two sides remain in synchronism, and that autoreclosure can proceed safely.
However, if the parallel interconnection(s) is/are lost, the frequencies of the two sections of
the split system will begin to slip with respect to each other during the time that the systems
are disconnected. Hence, a live busbar / live line synchronism check prior to reclosing the
breaker ensures that the resulting phase angle displacement, slip frequency and voltage
difference between the busbar and line voltages are all within acceptable limits for the
system. If they are not, closure of the breaker can be inhibited.
The SYSTEM CHECKS menu contains all of the check synchronism settings for auto (“A/R”)
and manual (“Man”) reclosure and is shown in the table below along with the relevant default
settings:-
Menu text
Default setting
Setting range
Step size
Min
Max
GROUP 1
SYSTEM CHECKS
C/S Check Scheme for A/R 111
Bit 0: Live Bus / Dead Line,
Bit 1: Dead Bus / Live Line,
Bit 2: Live Bus / Live Line.
Dead / Dead made by PSL only (from
version A3.0 model 05)
C/S Check Scheme for Man
CB
111
Bit 0: Live Bus / Dead Line,
Bit 1: Dead Bus / Live Line,
Bit 2: Live Bus / Live Line.
Dead / Dead made by PSL only (from
version A3.0 model 05)
V< Dead Line
13V
5V
30V
1V
V> Live Line
32V
30V
120V
1V
V< Dead Bus
13V
5V
30V
1V
V> Live Bus
32V
30V
120V
1V
Diff Voltage
6.5V
0.5V
40V
0.1V
Diff Frequency
0.05Hz 0.02Hz
1Hz 0.01Hz
Diff Phase
20°
5°
90°
2.5°
Bus-Line Delay
0.2s
0.1s
2s
0.1s
KEY: “Diff” denotes the differential between Line VT and Busbar VT measurements.
−
At least one condition of c/s scheme must be selected in the 3 bits, to activate the c/s
check logic.
−
Man CB, check sync condition is tallen in account, only if a logic of STF has been
enabled by S1.
−
If SOTF is disabled in S1, a dedicated PSL must be created using Deb B (live L or live
B/Dead L) – live/live could not be managed – in that case.
Содержание MiCOM P441
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