207
F
F
o
o
r
r
t
t
r
r
e
e
s
s
s
s
9
9
5
5
0
0
0
0
/
/
9
9
3
3
0
0
0
0
O
O
n
n
l
l
i
i
n
n
e
e
M
M
a
a
n
n
u
u
a
a
l
l
Open
A
Glo
ssar
y &
T
e
ch
n
ical su
pp
or
t
S
S
M
M
B
B
u
u
s
s
(
(
S
S
y
y
s
s
t
t
e
e
m
m
M
M
a
a
n
n
a
a
g
g
e
e
m
m
e
e
n
n
t
t
B
B
u
u
s
s
)
)
SMBus is also called I2C bus. It is a two-wire bus developed for component communication
(especially for semiconductor IC). For example, set clock of clock generator for jumper-less
motherboard. The data transfer rate of SMBus is only 100Kbit/s, it allows one host to communicate
with CPU and many masters and slaves to send/receive message.
S
S
P
P
D
D
(
(
S
S
e
e
r
r
i
i
a
a
l
l
P
P
r
r
e
e
s
s
e
e
n
n
c
c
e
e
D
D
e
e
t
t
e
e
c
c
t
t
)
)
SPD is a small ROM or
EEPROM
device resided on the
DIMM
or
RIMM
. SPD stores memory
module information such as DRAM timing and chip parameters. SPD can be used by
BIOS
to
decide best timing for this DIMM or RIMM.
U
U
l
l
t
t
r
r
a
a
D
D
M
M
A
A
/
/
3
3
3
3
Unlike traditional PIO/DMA mode, which only uses the rising edge of IDE command signal to
transfer data. UDMA/33 uses both rising edge and falling edge, the data transfer rate is double of
the PIO mode 4 or DMA mode 2.
16.6MB/s x2 = 33MB/s
