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Frequently Asked Questions
B-6
The following table lists the transfer rate of IDE PIO and DMA modes. The
IDE bus is 16-bit, which means every t ransfer is two bytes.
Mode Clock per
33MHz
PCI Clock
count Cycle
time Data Transfer rate
PIO mode 0 30ns 20 600ns (1/600ns) x 2byte = 3.3MB/s
PIO mode 1 30ns 13 383ns (1/383ns) x 2byte = 5.2MB/s
PIO mode 2 30ns 8 240ns (1/240ns) x 2byte = 8.3MB/s
PIO mode 3 30ns 6 180ns (1/180ns) x 2byte = 11.1MB/s
PIO mode 4 30ns 4 120ns (1/120ns) x 2byte = 16.6MB/s
DMA mode 0 30ns 16 480ns (1/480ns) x 2byte = 4.16MB/s
DMA mode 1 30ns 5 150ns (1/150ns) x 2byte = 13.3MB/s
DMA mode 2 30ns 4 120ns (1/120ns) x 2byte = 16.6MB/s
DMA/33 30ns 4 120ns (1/120ns) x 2byte x2 =
33MB/s
Q: What is PnP (Plug and Play)?
A: In the past, the IRQ/DMA and memory or I/O space of add-on cards are
normally set manually, i.e., by jumper or by proprietary utility. The user has
to check the user's guide for the correct setting. Sometimes, resource
conflict occurs and this leads to unstable system. The PnP specification
suggests a standard register interface for both BIOS and OS (such as
Win95). These registers are used by BIOS and OS to configure system
resource and prevent any conflicts. The IRQ/DMA/Memory will be
automatically allocated by PnP BIOS or OS.
Currently, almost all the PCI cards and most ISA cards are PnP compliant.
If you are still using a Legacy ISA card that cannot support PnP, set the
corresponding resource (IRQ/DMA/memory) to
ISA
in the BIOS "PCI/PnP
Setup".
Q: What is ACPI (Advanced Configuration & Power Interface) and OnNow?
A: The ACPI is new power management specification of 1997 (PC97). It
intends to save more power by taking full control of power management to
operating system and not through BIOS. Because of this, the chipset or
super I/O chip needs to provide standard register interface to OS (such as
Win97) and provides the ability for OS to shutdown and resume power of
different part of chip. The idea is a bit similar to the PnP register interface.
ACPI defines momentary soft power switch to control the power state
transition. Most likely, it uses the ATX form factor with momentary soft