AOpen AP5VM, Руководство пользователя

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Hardware Installation
2-30
For double side memory module, there is one limitation. This mainboard
supports only 4 RAS# (Row address latch) signals for DRAM control. They
can only be occupied by one DRAM module, they can not be shared.
The
simple rule is: If double side module at either Bank1 or DIMM, the other
must be empty
. Bank0 has no such limitation.
Double side module at either
Bank1 or DIMM socket, the
other must be empty.
Following table explains more about the RAS limitation. You can see that
Bank1 1st side and DIMM 2nd side use the same RAS3#, and Bank1 2nd side
and DIMM 1st side use the same RAS4#. If you are using single side SIMM at
Bank1 and single side DIMM, it should be no problem. But if you are using
double side DIMM or double side SIMM at Bank1, the other must be empty.
Bank0
1st side Bank0
2nd side Bank1
1st side Bank1
2nd side DIMM
1st side DIMM
2nd side
RAS0# X
RAS1# X
RAS2# X X
RAS3# X X
Caution: Make sure that you install the same SIMM
type and size for each bank.
Caution: There are some old DIMMs made by EDO or
FPM memory chip, they can only accept 5V power and
probably can not fit into the DIMM socket, make sure
you have 3.3V true SDRAM DIMM before your insert it.