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Alternatively, you can use the SEQUENCER OUTPUT to
control the brightness of the sound for each pitch, thereby
creating accents. This patch can be created easily on a 2600
by simply connecting the SEQUENCER OUTPUT to the VCF
control input.
VI.10. CLOCK DIVIDER
The Clock Divider section of the
Step Brother corresponds
to a frequency divider, or also a clock divider when your work
with time / sync clock signals. At a conceptual level, it will
allow us to obtain from a periodical signal a subdivision of
the main frequency signal present at the input. So for exam-
ple the subdivision of 2 will give us a signal that will be half
the frequency original being its square waveform regardless
of the waveform used as the input source. This is because
the divider circuit counts how many times the signal crosses
the positive axis and then generates a pulse corresponding
to the divider output.
In this divider design, unlike other designs where the divi-
sion factor must be selected in its output, we have all subdivi-
sions at same time in each output 2-3-4-5-6-7-8. We must point
the use of unusual subdivisions, since the most common in
Diagram 6
ANTONUS STEP BROTHER
+
+
MULTIPLE
CV INPUT
INPUT A
INPUT B
A
B
GATE
TRIG
CLOCK
FREQ
CLOCK
OUT
PULSE
WIDTH
FM
STOP
PWM
START/
STOP
CLOCK FM
START
FOOT SWITCH OUT
16/1 8/2
SEQUENTIAL RANDOM
9 10 11 12 13 14 15 16
1 2 3 4 5 6 7 8
GATE BUS 1
GATE BUS 2
GATE BUS 3
AND
A
B
GATE
BUS
1
GATE
BUS
2
GATE
BUS
3
POSITION
1
OUT
CLOCKED
GATE 1
OUT
QUANTIZED
OUTPUT A
QUANTIZER
A
SEQUENCER
OUTPUTS
QUANTIZER
B
QUANTIZED
OUTPUT B
ATTACK
GATE
IN
10
0
ENV
OUT
SYNC
P W
CV IN
INPUT
RESET
CLOCK DIVIDER
OSCILLATOR
VCA 2
ENVELOPE GENERATOR
1/3
1/4
1/5
1/6
1/7
1/8
1/2
X 1
X 10
HI
LO
MANUAL
DECAY
SUSTAIN
RELEASE
GATE ASSIGN
SKIP
RESET
OFF
STEP
RESET
GATE
BUS
1
OUT
IN
CV
VCA 1
OUT
IN
CV
CLOCK
OUT
AND
POSITION
1
OUT
CLOCKE
GATE
OUT
ANTIZED
UTPUT A
QU
OU
A
B
PWM
SEQUENCER
OUTPUTS
TO SYNTHESIZER
CV INPUT
TO SYNTHESIZER
GATE INPUT
Содержание STEP BROTHER
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