Preliminary - Information Subject to Change - 9/24/98
EZ-USB Development Board
5 - 5
Push-buttons, selector switches, and a seven-segment numeric
readout are connected to the AN2131Q I
2
C bus via the PCF8574
chips to give the firmware developer debug support while leaving
the EZ-USB IO Ports A, B and C available for the application under
development. U11 provides eight outputs to the seven-segment
numeric display. U12 provides eight inputs from four push-buttons
(S2-S5), two rocker switches, and two general purpose signals
(S6X, S7X) from the plug-in prototype board. A state change on
any U12 input triggers the AN2131Q WAKEUP# pin. Thus any of
the push buttons can be used to initiate a remote USB wakeup.
Two 32 Kilobyte RAMs supplement the 8 Kilobytes of program
and data RAM in the AN2131Q. Debug monitor code may be
loaded into this external RAM to keep the AN2131Q internal RAM
free for user code. A 22V10 PAL provides the external RAM enable
signals. Two configuration switches allow four different memory
maps for the external RAM.
The EZ-USB 8051 contains two UARTS. Both are brought out to
jumper block JP1, which connects the UART signals to an RS-232
level shifter and two DB-9 female connectors. The shorting plugs
on JP1 may be removed to disconnect the RS-232 level shifters if
the IO pin functions are required by the system.
An eight position DIP Switch selects various board options. The
signals MM1 and MM0 connect to PLD U5, a 22V10, to select one
of four memory maps. (Refer to “Memory Maps” on page 5-11.)
The signals SA1 and SA0 connect to EEPROM address lines to
select various I
2
C bus secondary addresses. Two switch signals
connect to an 8574 (U12) for general purpose use. The 8051 in the
AN2131Q can read the state of these switches using the I
2
C bus.
