Preliminary - Information Subject to Change - 9/24/98
EZ-USB Development Board
5 - 17
Prototype
Board
Expansion
Connectors
P1-P5
Five 20-pin headers connect interface signals from the EZ-USB
Development board to the prototype board. Headers P1-P3 and P5
are pin compatible with HP model 1660 Logic Analyzers to
simplify pod connection. P4 has 3.3V on pin 20, and is not pod
compatible.
The following table describes these signals. In the table, the EZ-
USB Development Board is abbreviated as “EZDB”. Active-low
signals end with “#”. Direction is relative to the EZDB.
[ 1 , 1 , 0 , 1 , 0 ] -> [ 0 , 1 , 0 , 0 , 0];“ 11: top
and bot mem for rd or psen
[ 1 , 1 , 0 , 0 , 1 ] -> [ 0 , 1 , 0 , 0 , 0];
[ 1 , 1 , 0 , 1 , 1 ] -> [ 0 , 1 , 1 , 1 , 0];
[ 1 , 1 , 1 , 1 , 0 ] -> [ 1 , 0 , 0 , 0 , 0];“ PSEN
[ 1 , 1 , 1 , 0 , 1 ] -> [ 1 , 0 , 0 , 0 , 0];“ RD
[ 1 , 1 , 1 , 1 , 1 ] -> [ 1 , 0 , 1 , 1 , 0];“ neither
[ 1 , 0 , 1 , 1 , 0 ] -> [ 1 , 0 , 0 , 0 , 1];“ PSEN
[ 1 , 0 , 1 , 0 , 1 ] -> [ 1 , 0 , 0 , 0 , 1];“ RD
[ 1 , 0 , 1 , 1 , 1 ] -> [ 1 , 0 , 1 , 1 , 1];“ neither
test_vectors
([nRD,nPSEN] -> [nPRD])
[ 0 , 0 ] -> [ 0 ];
[ 0 , 1 ] -> [ 0 ];
[ 1 , 0 ] -> [ 0 ];
[ 1 , 1 ] -> [ 1 ];
END
