System Architecture
2-2
ADSP-21375 EZ-KIT Lite Evaluation System Manual
System Architecture
This section describes the processor’s configuration on the EZ-KIT Lite
board (
).
This EZ-KIT Lite has been designed to demonstrate the capabilities of the
ADSP-21375 processor. The processor core is powered at 1.2V, and the
IO is powered at 3.3V.
Figure 2-1. System Architecture Block Diagram
ADSP-21375
DSP
SRAM
USB Con
nector
E
Z
USB FX
JTAG
Header
Power Regulation
PBs (4)
JTAG Port
A5V
+7.0V
Co
nnector
Expansion
Connectors
Type A
1M x 8
Flash
16.384 MHz
Oscillator
Parallel
Port
3.3V
Stereo Out RCA
Jacks (4x2)
Stereo In RCA
Jacks (2x1)
DAI
1.2V
AD1835
CODEC
DPI
SPI FLASH
FLAGs
0,1, and 3
2
2
Headphone
Jack
Reset PB
8M x 16
SDRAM
LEDs
(5)
4
DPI
Conn
DAI
Conn
RS
232
Conn
ADM3202
ELVIS
Conn