EVAL-ADP5020
Rev. 0 | Page 17 of 24
07794-
025
VBO
AR
D
VBO
AR
D
VBO
AR
D
VBO
AR
D
VBO
AR
D
+
VBB
+
VL
D
O
+
VBK
XSH
T
D
W
N
VBO
AR
D
V
DDI
O
E
N
/GP
IO
VBO
AR
D
SYN
C
+
VBB
-VBB
+
VBK
-VBK
+
VL
D
O
-VL
O
XSH
T
D
W
N
AG
N
D
F
or
ce
E
N
EXT FREQ.
EN = High
EN = Low
Buck-Boost ON
LDO ON
Buck ON
XSHTDWN = High
9.6MHz/19.2MHz Ext. Frequency
EN/GPIO = High
+ VOUT_BB
- VOUT_BB
+ VOUT_BK
- VOUT_BK
+ VOUT_LDO
- VOUT_LDO
XSHTDWN
PGND
AGND
R3
680
R3
680
LK
12
2 W
ay
Li
nk
LK
12
2 W
ay
Li
nk
1
3
2
R
37
10K
R
37
10K
T
P1
0
T
P1
0
1
SM
2
C
LR
SM
2
C
LR
2
1
3
4
5
D9
L
ED
D9
L
ED
LK
11
2 W
ay
Li
nk
LK
11
2 W
ay
Li
nk
1
3
2
R1
680
R1
680
T
P9
T
P9
1
R
30
1M
R
30
1M
R
13
680
R
13
680
C1
10uF
C1
10uF
R
34
1M
R
34
1M
R
31
1M
R
31
1M
T
P2
T
P2
1
T
P4
T
P4
1
+
-
U
113
AD
C
M
P6
0
0
+
-
U
113
AD
C
M
P6
0
0
3
4
1
5
2
R
33
2.
2K
R
33
2.
2K
G
S
D
Q3
F
D
N
335N
G
S
D
Q3
F
D
N
335N
C2
0.
1uF
C2
0.
1uF
T
P5
T
P5
1
G
S
D
Q4
F
D
N
335N
G
S
D
Q4
F
D
N
335N
D1
L
ED
D1
L
ED
R
36
0
R
36
0
D
22
B
A
T
54T
W
-7-
F
D
22
B
A
T
54T
W
-7-
F
A1
1
A2
2
A3
3
K3
4
K2
5
K1
6
G
S
D
Q6
F
D
N
335N
G
S
D
Q6
F
D
N
335N
D7
L
ED
D7
L
ED
T
P3
T
P3
1
R
32
1M
R
32
1M
R
35
1M
R
35
1M
C3
10uF
C3
10uF
D5
L
ED
D5
L
ED
T
P6
T
P6
1
R7
680
R7
680
G
S
D
Q5
F
D
N
335N
G
S
D
Q5
F
D
N
335N
C4
0.
1uF
C4
0.
1uF
T
P7
T
P7
1
T
P8
T
P8
1
D4
L
ED
D4
L
ED
R5
680
R5
680
G
S
D
Q7
F
D
N
335N
G
S
D
Q7
F
D
N
335N
Figure 26. Motherboard Schematic—Interface Section
Содержание EVAL-ADP5020
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