Analog Devices EVAL-ADP5020, Руководство пользователя, Страница: 10 / 24

EVAL-ADP5020
Rev. 0 | Page 10 of 24
PROGRAM/RUN TURN-ON SEQUENCE
The TURN ON SEQUENCE section of the GUI window allows
you to create and run simple activation patterns for the available
regulators, mimicking the desired regulator sequence needed for a
specific application. The
First Regulator option button allows you
to turn on the first regulator and R1 to R2 Delay allows you to
program the delay between the first and second regulator from
1 ms to 10 sec. The
Second Regulator option button allows you
to turn on the second regulator, and R2 to R3 Delay allows you to
program the delay between the first and second regulator from
1 ms to 10 sec. Finally, the
Third Regulator option button allows
you to turn on the third and last regulator. It is not possible to select
more than one regulator under each regulator box (for example,
you cannot select both
Buck 2 and Buck 1 under First Regulator ).
However, if the application requires more than one regulator to be
turned on at the same time, set the
R1 to R2 Delay time to 0 ms,
then select another regulator under Second Regulator . If all three
regulators must be activated at the same time, set the R2 to R3
Delay time to 0 ms, then select the third regulator under Third
Regulator .
Click the Start TON Sequence button to run the programmed
pattern. Once the pattern is sent to the ADP5020 in the daughter-
board, the
Regs are OFF indicator changes to Regs are ON and
lights up.
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Figure 16. Turn-On Sequence Example
Figure 16 shows a sequencing example where the first regulator
activated is Buck 1. After one second, Buck 2 is activated. After
another second, the LDO turns on. The XSHTDWN signal
becomes high 1 ms after the last regulator (LDO in this example).
This delay is hardcoded in the ADP5020 and cannot be changed.
The software automatically sets the XSHTDN masking bit if the
regulators are set to
None . Although unnecessary, it is possible
to create a sequence where all the regulators are set to None (that
is, all disabled).
Once a sequence is started, you can verify the PGOOD and TSD
device status (under
Buck 1 PGOOD , Buck 2 PGOOD , LDO
PGOOD , and Thermal Shutdown ) in the USER REGISTER
section of the GUI. If the option Regs Refresh is enabled (that
is, the check box is selected), the status of PGOOD and TSD is
updated automatically at the rate programmed under the
Refresh
Rate box.
Note that the timing used for the sequencing uses the PC internal
clock with 1 ms resolution. In addition, there are time lags due to
the program execution and communication with the adapter
board. Therefore, timing precision may be affected, especially for
short durations, and may vary from PC to PC.
PROGRAM/RUN TURN-OFF SEQUENCE
The turn-off sequence follows the same indications provided for
the turn-on sequence except that the operation is executed in
reverse order.
REGISTERS COMMANDS
The Read Registers button, when clicked, reads all the ADP5020
internal registers (Addresses 0x00 to Address 0x05) and updates
the
USER REGISTERS section with the new values.
The Write Registers button, when clicked, writes the current
registers values set in the USER REGISTERS section into the
ADP5020 volatile memory. If the Verify after write check box is
selected, the program reads back the programmed registers and
compares the device values with the set values (buffer). If one or
more errors are detected, a message appears, indicating the
registers at fault. Figure 17 shows a verification error example.
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Figure 17. Verification Error
The Clear Regs button, when clicked, sets the registers to 0.
A message appears requesting confirmation to continue (click
YES ) with the operation or abort it (click NO ), leaving the
registers unchanged.
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Figure 18. Register Clearing Confirmation