UG-1673
Rev. 0 | Page 4 of 29
EVALUATION BOARD HARDWARE
POWER SUPPLIES
The EVAL-ADIN1200FMCZ operates from a single, external
supply rail.
Apply 5 V either to the P4 plug or to the EXT_5V connector
with the JP3 jumper configured for 5 V at Position A.
The rest of the EVAL-ADIN1200FMCZ power requirements are
generated from the 5 V supply. The on-board
device
generates the AVDD_3P3 and VDDIO power rails. The default
nominal voltages are listed in Table 1.
The VDDIO voltage rail defaults to 2.5 V with the installed
components, and can be adjusted if other VDDIO voltages are
required by changing the value of the R16 resistor accordingly,
as shown in Table 1.
Table 1. Default Device Power Supply Configuration
Supply Rail
Nominal Voltage
Adjustment
AVDD_3P3
3.3 V
Not applicable
VDDIO
2.5 V
1.8 V with R16 = 130 kΩ
2.5 V with R16 = 200 kΩ
3.3 V with R16 = 280 kΩ
Table 2 shows an overview of the EVAL-ADIN1200FMCZ
current for various operating modes.
Table 2. EVAL-ADIN1200FMCZ Quiescent Current
(EXT_5V = 5 V)
Board Status
Typical Quiescent Current
On Power-Up
30 mA initially
6.5 mA in energy detect power
down (EDPD) mode
In Hardware Power-Down
(RESET_N Held Low)
6.5 mA
10BASE-TX
50 mA
100BASE-TX
60 mA
POWER SEQUENCING
There are no power sequencing requirements for the
When using the EVAL-ADIN1200FMCZ with the MDIO
interface dongle, there is a known sequence requirement for the
MDIO interface dongle. It is recommended that the MDIO
interface dongle be powered from the USB prior to connection
to the EVAL-ADIN1200FMCZ. Alternatively, if issues are
observed, restart the graphical user interface (GUI) software to
resolve any board connection issues.
EVALUATION BOARD USAGE OPTIONS
The EVAL-ADIN1200FMCZ can be used in two general modes.
In standalone mode, the EVAL-ADIN1200FMCZ can be used
to evaluate the
in IEEE 802.3 test modes, establish
links with a link partner, and evaluate the performance of the
chip. In standalone mode, power the EVAL-ADIN1200FMCZ
with a 5 V supply at the EXT_5V connector.
Alternatively, the EVAL-ADIN1200FMCZ has an FMC low pin
count (LPC) connector that can be plugged into an FPGA
development board. When used with an FPGA board, the
media independent interfaces (MIIs), clocks, and light emitting
diodes (LEDs) can be connected to the FPGA board where the
MAC and upper layers can be implemented for evaluation of
the
JUMPER OPTIONS
A minimal number of jumpers on the EVAL-ADIN1200FMCZ
must be set for the required operating setup before using the
EVAL-ADIN1200FMCZ for evaluation. The functions and
default settings of these jumper options are described in Table 3.
Table 3. Default Jumper Options
Link
Position Function
JP2
B (high)
This jumper sets the write mode of U7.
Position A (low): enable writing to the
electrically erasable programmable read
only memory (EEPROM)
Position B (high): write protect the
EEPROM (default)
AVDD3P3 Inserted
Nominal 3.3 V
VDDIO
Inserted
Nominal 2.5 V
CLOCK OPTIONS
The EVAL-ADIN1200FMCZ provides the option to supply the
clock requirements from either an on-board crystal
oscillator or an external clock applied to the J1 connector.
The crystal oscillators on the EVAL-ADIN1200FMCZ and the
MDIO interface dongle include the following:
•
Y1 is a 25 MHz crystal connected across the
XTAL_I/CLK_IN/REF_CLK pin and XTAL_O pin of the
on the EVAL-ADIN1200FMCZ.
•
Y2 is a 32.768 kHz crystal used on the MDIO interface
dongle for the on-board
•
Y3 is a 26 MHz crystal used on the MDIO interface dongle
for the on-board
When a 25 MHz external clock is applied to the J1 connector,
the R120 resistor must be populated and the Y1 crystal must be
removed if the signal applied to J1 is used by the
The 25 MHz clock must be a sine or square wave signal with an
input range of 1.8 V to 2.5 V. See the
more information.
