UG-1819
Rev. 0 | Page 3 of 24
EVALUATION BOARD BLOCK DIAGRAM
SD
P-
B
ADS
P
-BF
5
2
7
S
T
AT
US
ADR4
5
2
5
2
.5
V
O
UT
P
UT
NC
V
O
UT
NC
NC
V
IN
NC
G
ND
TP
US
B
PO
W
ER
RE
F
–
RE
F
+
RE
F
O
UT
RE
G
CAP
A
IOV
D
D
RE
G
CAP
D
V
BI
AS
–
X
TA
L1
X
T
AL
2
/CL
KI
O
CS
S
CL
K
DI
N
DO
UT
/RDY
A
VSS
NO
T
E
S
1
. F
OR
S
IM
P
L
IC
IT
Y
D
E
C
OU
P
L
IN
G IS
N
OT
S
H
OW
N
.
PO
W
ER
=
5
V O
R
3
.3
V
A
D
u
M
5411
P
O
W
E
R AND DAT
A
PO
W
ER
=
5
V O
R
3
.3
V
V
O
LTA
G
E
INP
UT
S
P
R
OT
E
C
T
ION
V
IN0
V
IN1
V
IN2
V
IN3
V
IN4
V
IN5
V
IN6
V
IN7
V
INCO
M
X
T
AL
AND I
NT
E
RNAL
CL
O
CK O
S
CI
L
L
AT
O
R
CI
RCUI
T
RY
RAI
L
T
O
RAI
L
RE
F
E
RE
NCE
INP
UT
BUF
F
E
RS
Σ-
Δ
ADC
1.
8V
L
DO
M
UX
1.
8V
L
DO
INT
RE
F
S
E
RI
AL
INT
E
RF
ACE
D
IGIT
A
L
FI
LTE
R
BUF
F
E
RE
D
PR
EC
ISI
O
N
RE
F
E
RE
NCE
A
D
4114
T
E
M
P
E
RAT
URE
SEN
SO
R
AV
DD
V
IN8
V
IN9
V
IN1
0
V
IN1
1
V
IN1
2
V
IN1
3
V
IN1
4
V
IN1
5
PR
EC
ISI
O
N
V
O
LTA
G
E
DI
V
IDE
R
GP
O C
ON
T
R
OL
GP
IO0
GP
IO1
GP
O2
GP
O3
24002-002
Figure 2. EVAL-AD4114SDZ Block Diagram
