background image

 

 

10 A

NALOG 

D

EVICES

,

 

I

NC

.

 

C

ONFIDENTIAL

 DC9006A

 AND 

DC9004B

 

U

SER 

G

UIDE

 

Jumper Description Default 

Note 

disconnects the JTAG lines from one of the USB serial interface and 

should always be installed unless the USB JTAG interface is 
supported in the development or evaluation tools; 

"SPI OFF" to disconnect SPI lines, RESETn and FLASH_P_ENn; 

"CLI OFF" to disconnect UARTC0 TX and RX; and, 

"API OFF" to disconnect serial API signals. 

 

 

OFF 

OFF 

OFF 

JP5 

Carries current to the  Eterna Evaluation and Development Board.  

JP5 should always be installed unless an ammeter is connected 

across the P3 header.

 

ON 

 

JP7 

Enables the VCCA rail, the 3.6V isolated power supply to the Eterna 

Evaluation and Development Board. JP7  should normally be 
installed in the “ON” position (pin 1 & 2);  the “OFF” position (pin 2 

& 3) may be used to disable the VCCA rail and provide power from 
an external source. 

 

ON 

(1) 

JP8 

Controls the isolated supplies of the Interface Card (V+ and the 
derived VCCA and +5V rails).  JP8 should normally be installed in 

the “ON” position (pin 1 & 2);  the “OFF” position (pin 2 & 3) may be 

used to disable the on-board generation of the isolated V+ supply 
and provide power from an external source set between 9V and 12V.  

 

ON 

(1) 

JP9 

Controls a power switch on the USB 5V supply.  JP8 should 
normally be installed in the “ON” position (pin 1 & 2);  the “OFF” 

position (pin 2 & 3) may be used to disconnect the Interface Card 
from the USB 5V supply. 

 

ON 

(1) 

JP10 

Connects the Eterna Evaluation and Development Board battery to 
logic that determines when power is to be switched from battery to 

the isolated VCCA rail.  JP10 jumper should normally be installed 

for proper power switching operation.  JP10 jumper may be 
removed to prevent battery current flow in special situations such as 

unpowered Interface Card connected to the Eterna Evaluation & 

Development Board.  

 

ON 

 

(1) when no jumper is installed, the Interface Card defaults to the “ON” state 

Interface Signal Disconnection 

To perform accurate current measurements, it is recommended to disconnect the 
Interface Card signals from the Eterna Evaluation & Development Board by 

installing all JP1 jumpers.  

Since so little power is required by the LTC5800 to operate, the Eterna Evaluation & 

Development Board may gather enough power from current flowing through the 

Interface Card signals and its ESD protection diodes.  

External JTAG & Reset Pushbutton 

The external JTAG connector (P1) allows the use of 3

rd

 party development systems 

with the Eterna Evaluation & Development Board.  P1 is a 2x10 pin .100” header 

compatible with JTAG/SWD emulators such as IAR or Segger J-Link.  

The Interface Card features a momentary push button (PB1).  PB1 only asserts the 
JTAG and the Eterna Evaluation & Development Board reset signal (RESETn).  

 

Содержание Dust Networks DC9004B

Страница 1: ...Dust Networks Eterna Evaluation Development DC9006A and DC9004B User Guide Interface Card Programming JTAG Adapter...

Страница 2: ...mper Settings 9 Interface Signal Disconnection 10 External JTAG Reset Pushbutton 10 Eterna Evaluation and Development Mote Socket Pinout 11 Programming Adapter DC9004B 12 Introduction 12 Usage 13 Inte...

Страница 3: ...ote Datasheet LTC5800 IPR SmartMesh IP Manager Datasheet LTC5800 WHM SmartMesh WirelessHART Mote Datasheet Eterna Board Specific Parameter Configuration Guide Eterna Serial Programmer Guide Eterna 580...

Страница 4: ...story Revision Date Description 1 May 19 2017 First Release 2 July 11 2017 Added footer ADI Confidential notice Internal Document Number 040 0132 4 ANALOG DEVICES INC CONFIDENTIAL DC9006A AND DC9004B...

Страница 5: ...tures test points to monitor the mote current consumption and jumpers for various configurations Figure 1 DC9018B Mote left connected to the DC9006A Interface Card right Installation The Interface Car...

Страница 6: ...al Programmer Guide Setup For details on operating the Eterna Evaluation Development Board Set in a network please refer to the starter kit documentation SmartMesh IP Easy Start Guide or SmartMesh Wir...

Страница 7: ...ard JTAG JTAG is only supported with an external JTAG device not included such as I Jet from IAR with a 20pin 1 adapter or J Link from Segger The external JTAG device must be connected to the JTAG Hea...

Страница 8: ...ures signals that are directly connected to the Eterna Evaluation Development Board connector P1 signals are referenced to the isolated ground Power Switch Over The Interface Card compares its VCCA ra...

Страница 9: ...be installed see section Mote Signal Disconnection Note In applications where a high current is required jumper P4 shall be installed this shunts the sense resistor R55 and eliminates the associated...

Страница 10: ...rmally be installed in the ON position pin 1 2 the OFF position pin 2 3 may be used to disconnect the Interface Card from the USB 5V supply ON 1 JP10 Connects the Eterna Evaluation and Development Boa...

Страница 11: ...Eterna Evaluation and Development Board Pin Signal Direction Pin Signal Direction 1 UART_TX_CTSn O 2 UART_TX_RTSn I 3 UART_TX I 4 GND 5 UART_RX O 6 UART_RX_RTSn O 7 UART_RX_CTSn I 8 UARTC0_TX UARTC1_T...

Страница 12: ...llowing customer board connections the 2x5 2mm pitch programming header described in the integration guide a 050 pitch variant of the programming header a 2x5 surface mount programming footprint match...

Страница 13: ...pitch 2x16 header with the same signals described in section Eterna Evaluation and Development Mote Socket Pinout Programming Interface Headers 2x5 0 050 2mm and 100 pitch The programming headers are...

Страница 14: ...ut of the JTAG P6 MOLEX 878321020 Pin Signal Direction Pin Signal Direction 1 TCK O 2 GND O 3 TMS O 4 TDO I 5 GND 6 TDI O 7 GND 8 RESETn 9 VSUPPLY 10 NC Signal direction is relative to the Programming...

Страница 15: ...connect the following signals to the customer board footprint below VSUPPLY GND RESETn TMS TDO TCK Figure 9 Tag Connect SWD Footprint LTP5900 Socket 26 pin 2mm pitch The following table describes the...

Страница 16: ...ust be greater than 2 7V Current Limit In the configuration where the customer board requires high current jumper P4 on the DC9006 Interface card shall be installed in order to short the sense resisto...

Страница 17: ...ILITY OR FITNESS FOR ANY PARTICULAR PURPOSE EXCEPT TO THE EXTENT OF THIS INDEMNITY NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT SPECIAL INCIDENTAL OR CONSEQUENTIAL DAMAGES The user assu...

Страница 18: ...indirectly any claim of personal injury or death associated with such unintended or unauthorized use even if such claim alleges that Dust Networks was negligent regarding the design or manufacture of...

Страница 19: ...DC9006A AND DC9004B USER GUIDE ANALOG DEVICES INC CONFIDENTIAL 19 Page Intentionally Left Blank...

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