ADAV4622
Rev. B | Page 3 of
28
FUNCTIONAL BLOCK DIAGRAM
AUDIO
PROCESSOR
ADAV4622
A-V
SYNCHRONOUS
DELAY
MEMORY
I
2
C INTERFACE
SIF PROCESSOR
AD0
SYNCHRONOUS
MULTICHANNEL
DIGITAL INPUTS
6-CHANNEL SRC
ASYNCHRONOUS
DIGITAL INPUT
2-CHANNEL SRC
ASYNCHRONOUS
DIGITAL INPUT
SYSTEM
CLOCKS
PLL
SPDIF_IN0
SPDIF_IN1
SPDIF_IN2
SPDIF_IN3
SPDIF_IN4
SPDIF_IN5
SPDIF_IN6
SPDIF_OUT/SDO1
S/PDIF I/O
PWM
DIGITAL
OUTPUT
PWM1A
PWM1B
PWM2A
PWM2B
PWM3A
PWM3B
PWM4A
PWM4B
PWM_READY
BCLK1
LRCLK1
SDO0/AD0
HPOUT2L
HPOUT2R
AUXOUT2L
AUXOUT2R
DAC
HPOUT1L
AUXOUT4R
AUXOUT4L
HPOUT1R
DAC
AUXOUT1L
AUXOUT1R
DAC
AUXOUT3L
AUXOUT3R
DAC
SCL
SDA
BCLK2
LRCLK2
BCLK0
LRCLK0
SDIN0
SDIN1
SDIN2
SDIN3
XOUT
MCLKI/XIN
MCLK_OUT
SIF_IN1
SIF_IN2
AUXIN2L
AUXIN2R
ADC
AUXIN1L
AUXIN1R
ADC
DIGITAL
OUTPUTS
BCLK1
LRCLK1
MUTE
07
06
8-
0
01
Figure 1. ADAV4622 with PWM-Based Speaker Outputs