Analog Devices ADAV4622 Скачать руководство пользователя | Manualshive

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ADAV4622

Rev. B | Page 11 of

28

07

06

8-

0

34

DVDD

1.8V

0V

3.3V

0V

AVDD

ODVDD

1.0s MAX

1.0s MAX

1.65V

3.0V

0.33V

0.18V

Figure 7. Power-Up Sequence Timing

070

68

-03

5

DVDD

1.8V

0V

3.3V

0V

AVDD

ODVDD

1.0s MAX

1.0s MAX

1.65V

3.0V

0.33V

0.18V

Figure 8. Power-Down Sequence Timing

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Содержание ADAV4622

Страница 1: ...3 V analog 1 8 V digital core and 3 3 V digital interface Available in 80 lead LQFP APPLICATIONS General purpose consumer audio postprocessing Home audio DVD recorders Home theater in a box HTIB syste...

Страница 2: ...HPOUT1R and HPOUT2R 20 PLL_LF 20 VREF 20 FILTA and FILTD 20 PWM1A PWM1B PWM2A PWM2B PWM3A PWM3B PWM4A and PWM4B 20 PWM_READY 20 AVDD 20 DVDD 20 ODVDD 20 DGND 20 AGND 20 ODGND 20 SIF_REFP SIF_REFCM an...

Страница 3: ...IF_IN3 SPDIF_IN4 SPDIF_IN5 SPDIF_IN6 SPDIF_OUT SDO1 S PDIF I O PWM DIGITAL OUTPUT PWM1A PWM1B PWM2A PWM2B PWM3A PWM3B PWM4A PWM4B PWM_READY BCLK1 LRCLK1 SDO0 AD0 HPOUT2L HPOUT2R AUXOUT2L AUXOUT2R DAC...

Страница 4: ...or 30 dBu EIAJ M Mono deviation mode 100 fFM 400 Hz f 25 kHz BW 20 Hz to 15 kHz rms detector FM Output Level at 25 Deviation Mode 53 7 FS A2 DK I BG Mono VSIF 100 mV fFM 400 Hz f 12 5 kHz rms detector...

Страница 5: ...Sensitivity 40 dBu Mono L fAM 400 Hz MOD 30 BW 20 Hz to 15 kHz rms detector S N N 10 dB BTSC M PERFORMANCE Measured at analog audio output video 75 color bar fSC 4 5 MHz fFM 1 kHz f 25 kHz 100 deemph...

Страница 6: ...Frequency Response 0 1 0 3 dB Mono 100 fFM 25 Hz to 15 kHz Crosstalk Dual 89 dB Mono or dual off 100 1 kHz Channel Separation Stereo 70 dB Stereo L off R 50 1 kHz NICAM I PERFORMANCE Measured at analo...

Страница 7: ...input Total Harmonic Distortion Noise 78 dB 3 dB with respect to full scale code input DAC SECTION Number of Auxiliary Output Channels 8 Four stereo channels Resolution 24 Bits Full Scale Analog Outp...

Страница 8: ...equivalent to a 90 k pull up resistor IIH RESET 13 5 A VIH ODVDD equivalent to a 266 k pull up resistor IIL SDO0 SCL SDA 40 A VIL 0 V equivalent to a 90 k pull down resistor Output Voltage High VOH 2...

Страница 9: ...After this period the first clock is generated tDS Data setup time 100 ns tSCR SCL rise time 300 ns tSCF SCL fall time 300 ns tSDR SDA rise time 300 ns tSDF SDA fall time 300 ns Stop Condition tSCS Se...

Страница 10: ...VDD GND Figure 3 Master Clock Output Timing LRCLK1 BCLK1 SDINx SDO0 tSLS tSLH tSDS tSDH tSDD 07068 002 Figure 4 Serial Port Slave Mode Timing LRCLK1 BCLK1 SDINx SDO0 tMLD tMDS tMDH tMDD 07068 003 Figu...

Страница 11: ...68 034 DVDD 1 8V 0V 3 3V 0V AVDD ODVDD 1 0s MAX 1 0s MAX 1 65V 3 0V 0 33V 0 18V Figure 7 Power Up Sequence Timing 07068 035 DVDD 1 8V 0V 3 3V 0V AVDD ODVDD 1 0s MAX 1 0s MAX 1 65V 3 0V 0 33V 0 18V Fig...

Страница 12: ...operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied Exposure to absolute maximum rating conditions for exten...

Страница 13: ...SPDIF_OUT SDO1 39 PWM_READY 40 DVDD ISET AUXIN1R AUXIN1L AUXIN2R AUXIN2L AUXOUT2R AUXOUT2L AUXOUT1R AUXOUT1L AVDD AGND AGND AVDD FILTD NC AUXOUT4R AUXOUT4L AUXOUT3R AUXOUT3L HPOUT2R 80 79 78 77 76 75...

Страница 14: ...Mux Left Right Clock for Serial Data I O Default 37 SDO0 AD0 Serial Data Output This pin acts as the I2 C address select on reset It has an internal pull down resistor 38 SPDIF_OUT SDO1 Output of S P...

Страница 15: ...DAC Supply 3 3 V 72 AUXOUT1L Left Auxiliary Output 1 73 AUXOUT1R Right Auxiliary Output 1 74 AUXOUT2L Left Auxiliary Output 2 75 AUXOUT2R Right Auxiliary Output 2 76 AUXIN2L Left Auxiliary Input 2 77...

Страница 16: ...Response 48 kHz 0 6 0 6 0 4 0 2 0 0 2 0 4 0 2 MAGNITUDE dB FREQUENCY kHz 8 16 4 07068 009 Figure 12 DAC Pass Band Ripple 48 kHz 0 30 60 90 120 150 180 210 240 270 300 0 3 MAGNITUDE dB FREQUENCY kHz 12...

Страница 17: ...DAC Total Harmonic Distortion Noise 0 160 MAGNITUDE dBV 140 120 100 80 60 40 20 07068 015 0 20000 FREQUENCY Hz 4000 8000 12000 16000 Figure 18 ADC Dynamic Range 0 160 MAGNITUDE dBV 140 120 100 80 60 4...

Страница 18: ...t to a full scale 1 kHz sine wave input on the other channel expressed in decibels Power Supply Rejection With no analog input the signal present at the output when a 300 mV p p signal is applied to p...

Страница 19: ...an MPEG decoder to the ADAV4622 on chip S PDIF output multiplexer If SPDIF_OUT is selected from one of the SPDIF_IN external signals the signal is simply passed through from input to output SDO0 AD0 S...

Страница 20: ...outputs from the headphone amplifiers PLL_LF PLL loop filter connection A 100 nF capacitor and a 2 k resistor in parallel with a 1 nF capacitor tied to AVDD are required for the PLL loop filter to op...

Страница 21: ...Processor Configuration The ADAV4622 supports automatic standard detection which is enabled by default The ASD controller configures the SIF processor with the optimum register settings based on the d...

Страница 22: ...ress by sampling the SDO0 pin after reset Internally the SDO0 pin is sampled by four MCLKI edges to determine the state of the pin high or low Because the pin has an internal pull down resistor defaul...

Страница 23: ...IN3 By default these muxes are configured so that the synchronous inputs are available to the audio processor The SRC2B and SRC2C channels can be made available to the audio processor simply by enabli...

Страница 24: ...M MODULATOR PWM MODULATOR PWM4A PWM_READY PWM4B PWM MODULATOR 07068 026 Figure 29 PWM Output Section Each set of PWM outputs is a complementary output The modulation frequency is 384 kHz and the full...

Страница 25: ...ble upon request Contact a local Analog Devices sales representative for more details AUDIO PROCESSOR The internal audio processor runs at 2560 fS at 48 kHz this is 122 88 MHz Internally the word size...

Страница 26: ...ister write The EEPROM device address and the EEPROM start address for the audio flow ROMs can all be programmed For the duration of the boot sequence the ADAV4622 becomes the master on the I2 C bus T...

Страница 27: ...WM1 LHIGH PWM2 RHIGH MUTE PWM3 LLOW PWM4 RLOW AUXOUT2L HPOUT2L AUXOUT2R HPOUT2R HPOUT1L AUXOUT4L HPOUT1R AUXOUT4R SUB CHANNEL TO INPUT MUXES S PDIF OUTL SDOL1 S PDIF OUTR SDOR1 MUTE TRIM SDO0 MUX SDOL...

Страница 28: ...ead Low Profile Quad Flat Package LQFP ST 80 2 EVAL ADAV4622EBZ1 Evaluation Board 1 Z RoHS Compliant Part In addition it is backward compatible with conventional SnPb soldering processes This means th...

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