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UG-073 

Evaluation Board User Guide

 

Rev. 0 | Page 4 of 

12

 

OUTPUT SIGNALS 

The evaluation board provides the option to evaluate the analog 
outputs directly from the DAC (default) or the output of the RF 
quadrature modulato

ADL5375

driven by the DAC. The DAC 

output can also be evaluated as a single-ended buffered output 
with an op amp for applications requiring low frequency 
signals. 

The evaluation board also provides access on a connector to the 
auxiliary DAC outputs. Finally, the evaluation board provides a 
data clock output intended to synchronize the DPG2 evaluation 
board with the AD911x or AD971x internal clock. 

DEFAULT OPERATION AND 
JUMPER SELECTION SETTINGS 

This section explains the default and optional settings or modes 
allowed on the AD911x and AD971x Rev. A evaluation boards. 

Power Circuitry 

Connect the USB cable to the USB Mini-B P1 connector.  
The USB connections provide the power supply to the evalu-
ation board.  

By default, the evaluation board provides on-board regulators to 
supply the AD911x or AD971x (DVDD, CVDD, and AVDD)  
as well as auxiliary circuits, such as the level translator (DVDDX) 
and the clock distribution chip (CVDDX). These regulators can be 
set up to regulate the primary voltage to 3.3 V or 1.8 V, depending 
on the setting of the 2-position jumpers: JP22, JP26, JP29, JP88,  
and JP89 (see Figure 2). Alternatively, external power supplies can 
supply all the on-board components. The choice between internally 
or externally regulated power supplies can be done individually per 
power supply by two-position jumpers: JP6, JP10, JP54, JP15, and 
JP78 (see Figure 2). These regulated voltages are then connected to 
on-board filters to be used by the components on board. 

Note that, for simplicity, it is recommended to use the USB-
powered option combined with the on-board regulation. The 
choice of 3.3 V or 1.8 V regulation is left to the user depending 
on application. 

Table 1. Power Supply Jumpers 

Power 
Supply 
Output 

Jumper Position for 

Voltage Regulation 

Level

1

 

Jumper Position for 

Internally or Externally 

Regulated Voltage

1

 

3.3 V Default 

1.8 V 

Internal Default 

External 

CVDD 

JP22 1−2 

JP22 2−3 

JP6 2−3 

JP6 1−2 

DVDD 

JP26 1−2 

JP26 2−3 

JP10 2−3 

JP10 1−2 

AVDD 

JP29 1−2 

JP29 2−3 

JP54 2−3 

JP54 1−2 

DVDDX 

JP88 1−2 

JP88 2−3 

JP15 2−3 

JP15 1−2 

CVDDX 

JP89 1−2 

JP89 2−3 

JP78 2−3 

JP78 1−2 

1

1–2 means to place the jumper between Pin 1 and Pin 2; 2−3 means to place   

the jumper between Pin 2 and Pin 3. 

USB

3
2

1

JP22

JP6

1.8V

3.3V

2

1

FILTER

CVDD

CVDD_IN

3
2

1

JP26

JP10

1.8V

3.3V

2

1

FILTER

DVDD

DVDD_IN

3
2

1

JP29

JP54

1.8V

3.3V

2

1

FILTER

AVDD

AVDD_IN

3
2

1

JP88

JP15

1.8V

3.3V

2

1

FILTER

DVDD

DVDD

X

_IN

CVDD

X

_IN

3
2

1

JP89

JP78

1.8V

3.3V

2

1

FILTER

CVDD

0

86

98-

00

2

ADP3334A

ADP3334A

ADP3334A

ADP3334A

ADP3334A

 

Figure 2. Power Supply Jumpers Schematic 

Содержание AD911 Series

Страница 1: ...ncluding register defin itions The DPG2 user guide is also available for assistance with vector generation and loading GENERAL DESCRIPTION This user guide describes the AD911x and AD971x evaluation boards which provide all of the support circuitry required to operate the AD911x and AD971x in their various modes and configurations The application software used to interface with the devices is also ...

Страница 2: ... Description 1 Revision History 2 Evaluation Board Hardware 3 Power Supplies 3 Clock Signals 3 Input Signals 3 Output Signals 4 Default Operation and Jumper Selection Settings 4 Evaluation Board Software Quick Start Procedures 7 Configuring the Board 7 Using the Software for Testing 7 ESD Caution 12 REVISION HISTORY 3 10 Revision 0 Initial Version ...

Страница 3: ...isted TP5 AVDD TP12 TP24 CVDD and TP13 TP8 DVDD with grounds at TP6 TP14 TP23 TP4 and TP9 All voltages should show a reading of around 3 3 V with the factory default jumper settings as mentioned These voltages can be changed to 1 8 V by switching JP22 JP26 JP29 JP88 and JP89 to shunt Pin 2 and Pin 3 Alternatively external power supplies can be used to supply the AD911x or AD971x and its supporting...

Страница 4: ...rs JP22 JP26 JP29 JP88 and JP89 see Figure 2 Alternatively external power supplies can supply all the on board components The choice between internally or externally regulated power supplies can be done individually per power supply by two position jumpers JP6 JP10 JP54 JP15 and JP78 see Figure 2 These regulated voltages are then connected to on board filters to be used by the components on board ...

Страница 5: ...the SPI software see Section VI in the SPI section On the evaluation board three jumpers for each DAC select the configuration and maximum DAC current as shown in Table 3 Table 3 DAC Current Full Scale Jumpers DACI DACQ Jumper Setting Full Scale Current Jumper Setting Full Scale Current JP9 On JP8 Off JP7 Off AD971x 4 mA AD911x 20 mA JP20 On JP16 Off JP21 Off AD971x 4 mA AD911x 20 mA JP9 Off JP8 O...

Страница 6: ... Load Resistor Default On Chip Load Resistors R57 R50 On Off JP32 JP33 JP34 JP35 Off On RLOAD Load Resistor R57 for IDAC R50 for QDAC 62 5 Ω for AD911x 500 Ω for AD971x In the load mode configuration proposed the output voltage for each DAC can be calculated using the formula VOUTPUT RLOAD IOUT Pin Mode The AD971x and AD911x evaluation boards have the capability to function in pin mode This bypass...

Страница 7: ...dividers for the data clock going to the DPG2 and for the clock going to the DAC The divider ratio for the DAC clock should be double the ratio for the data clock as shown in Figure 4 08698 004 Figure 4 AD9512 Clock Divider Setting The clock going to the DAC should be no greater than 125 MHz When the AD9512 configuration is complete verify the clock frequency output to the DPG2 in Figure 3 The fre...

Страница 8: ...priate codes in the SPI Settings for the external shunts are listed in the Analog Outputs section To use the internal bias resistors see the SPI section for information on the settings that must be changed to fully enable and set these resistors SPI Software The SPI software consists of various small sections which are described here as they relate to the evaluation board Once the setting of the p...

Страница 9: ... DAC Set internal IRCM and QRCM values Set I Q auxiliary DAC code Set internal IGAIN and QGAIN values Section X Section VIII This section of the SPI configures the INL DNL calibration of the main DAC This section of the SPI configures the retimer of the DUT as follows Automatic or manual retimer selection Readback or setting of retimer phase 08698 007 SECTION I SECTION III SECTION IV SECTION V SEC...

Страница 10: ...re shown in Table 8 Table 8 Internal Resistor Options and SPI Code IRSET QRSET Value Code 16 kΩ 000000 default 32 kΩ 011111 8 kΩ 100000 16 kΩ 111111 Using the AUX DACs For LO Suppression To completely suppress the LO when using the modulator in the signal chain automatic VIs can be used to sweep the codes for all of the range and offset settings of the DAC Section IX of Figure 7 contains all of th...

Страница 11: ...3 J14 J19 and J23 which removes the resistors from the parallel connection with 1 kΩ 100 Ω at the input of the modulator to measure the individual resistances of those components Check if the resistance values are still incorrect and if so change out for the appropriate values listed above If not try resoldering the jumpers and test again to make sure there was not a problem with the previous conn...

Страница 12: ...REQ 19 93MHz 105 08MHz 16 25dBm 33 15dBm EXT REF DC COUPLED 1 2 Figure 9 DAC Output Spectrum ESD CAUTION Evaluation boards are only intended for device evaluation and not for production purposes Evaluation boards are supplied as is and without warranties of any kind express implied or statutory including but not limited to any implied warranty of merchantability or fitness for a particular purpose...

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