UG-073
Evaluation Board User Guide
Rev. 0 | Page 12 of 12
With a clock signal source of 250 MHz, the SPI DATACLK
divide ratio is set to 2 (f
DAC
= 125 MHz) and the DATACLK
divide ratio is set to 1 (f
DATA
= 250 MHz). These settings, which
are due to the interleaved data input format, allow the data to be
properly allocated to each DAC.
Set these settings in the SPI software front panel and then select
Run
. The readback for the SPI software is shown along the
right-hand side of the window and can be checked for accuracy
when debugging. After the DPG2 and SPI software setups are
completed and run, Figure 9 shows the spectrum that should be
observed on the analyzer.
The fundamental is present at about 20 MHz and the folded
image (f
DAC
– f
OUT
) is also visible, however it is easily filtered
with a low-pass filter before modulation.
REF –8dBm
#PEAK
LOG
10
dB/
LG AV
20
W1 S2
START 0Hz
#RES BW 30kHz
VBW 30kHz
STOP 130.00MHz
SWEEP 174.2ms (601 PTS)
#ATTEN 24dB
08
69
8-
0
09
MARKER
TRACE
TYPE
X AXIS
AMPLITUDE
1
2
(1)
(1)
FREQ
FREQ
19.93MHz
105.08MHz
–16.25dBm
–33.15dBm
EXT REF
DC COUPLED
1
2
Figure 9. DAC Output Spectrum
ESD CAUTION
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implied, or statutory including, but not limited to, any implied warranty of merchantability or fitness for a particular purpose. No license is granted by implication or otherwise under
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right to change devices or specifications at any time without notice. Trademarks and registered trademarks are the property of their respective owners. Evaluation boards are not
authorized to be used in life support devices or systems.
©2010 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
UG08698-0-3/10(0)
