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Evaluation Board User Guide 

UG-559 

 

Rev. B | Page 5 of 8 

Configuration for Decreasing Gain with Increasing 
Voltage on GAIN Pin 

Figure 5 shows the basic connections of the evaluation board. 

MODE is set to low to achieve these results. In this configuration, 
turning GAIN ADJ clockwise causes a decrease in applied gain. 
At full rotation clockwise, the gain equals 0 dB.  

 

Figure 5. Jumper Configuration for MODE = Low 

Configuration for Using AGC Loop 

For the application of the AGC loop, set MODE on the 

AD8338

 

to high. Set the DETO jumper (P5) as shown in Figure 6. With 
the board configured as illustrated in Figure 6, the signal into 
VAGC sets the output rms level.  

 

Figure 6. Jumper Settings for AGC Mode 

 
 
 

 

1

1510-

007

J5

J6

J7

J8

J11

J9

J12

J10

1

1510-

007

J5

J6

J7

J8

J11

J9

J12

J10

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Содержание AD8338-EVALZ

Страница 1: ...put An oscilloscope with a 100 MHz minimum bandwidth 3 SMA M to BNC M cables ONLINE RESOURCES AD8338 data sheet UG 559 user guide GENERAL DESCRIPTION This user guide describes the AD8338 evaluation bo...

Страница 2: ...ols 4 Modes and Input and Output Signals 4 Default Operation and Jumper Selection Settings 4 Evaluation Board Schematic 6 Ordering Information 7 Bill of Materials 7 REVISION HISTORY 3 16 Rev A to Rev...

Страница 3: ...s as indicated on the printed circuit board PCB 2 Set the power supply to 6 V 3 Enable the output 4 Set the output amplitude on the signal generator to 0 1 V on each channel 200 mV difference amplitud...

Страница 4: ...In this mode the user controls the rms output level through applying an input signal to VAGC For the lowest gain VAGC is tied to VREF where the loop attempts to attenuate the output to 0 V rms As the...

Страница 5: ...in equals 0 dB Figure 5 Jumper Configuration for MODE Low Configuration for Using AGC Loop For the application of the AGC loop set MODE on the AD8338 to high Set the DETO jumper P5 as shown in Figure...

Страница 6: ...ND GND GND GND GND GND GND GND GND GND GND GND GND GND GND U1 AD8338 J1 WM5534 ND J2 WM5534 ND J3 WM5534 ND J4 WM5534 ND J9 J10 005 01 0003 J11 005 01 0003 J12 J5 005 01 0003 J6 005 01 0003 J7 J8 VSUP...

Страница 7: ...C5 C6 C7 C9 C10 C11 C14 C16 C17 2 2 F capacitor 0805 package TDK C2012X7R1C225K125AB 1 R14 24 9 resistor 1 0603 Vishay CRCW060324R9FKEA 1 R15 4 02 k resistor 1 Vishay CRCW06034K02FKEB 2 R5 R6 49 9 re...

Страница 8: ...ADDITIONAL RESTRICTIONS Customer may not disassemble decompile or reverse engineer chips on the Evaluation Board Customer shall inform ADI of any occurred damages or any modifications or alterations i...

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