42 MegaRAC® M300V Card Implementer’s Reference and User’s Guide
LPC Bus Signals
The LPC bus is the main system CPU interface to the MegaRAC M300V card. The MegaRAC
M300V card compatible BMCs accept IPMI commands from the host system either through the
LPC bus (KCS, BT, SMIC) or through the I
2
C or SMBus (SSIF).
Signal Group: LPC
Signal Group
Signal Name
Signal Function
I/O
Signal
Termination on
MB*
LPC
LAD0
LPC address-data bus
I/O
10k PU to +3.3V
LAD1
LAD2
LAD3
LFRAME_L
LPC frame signal
I
N/A
LRST_L
LPC reset for mCard LPC interface
I
N/A
LDRQ_L
LPC DMA request signal
O
10k PU to +3.3V
SERIRQ Serialized
IRQ signal
I/O
N/A
LCLKRUN_L
Clock run (same as PCI CLKRUN#)
O
10k PU to +3.3V
LCLK
LPC clock signal
I
N/A
•
All LPC signals as defined in the LPC specification
Miscellaneous Signals
No relationship is implied between miscellaneous signals in this group.
Signal Group: Miscellaneous
Signal Group
Signal Name
Signal Function
I/O
Signal
Termination on
MB*
Misc
CLK_32768
Not Used By M300V
I
N/A
Содержание MegaRAC M300V
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