Alpha Data ADM-PCIE-9V5, Руководство пользователя

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ADM-PCIE-9V5 User Manual
GTY Quad 132
X0Y52 - X0Y55
SLR Crossing
GTY Quad 128
X0Y36 - X0Y39
GTY Quad 127
X0Y32 - X0Y35
M [LN]
GTY Quad 126
X0Y28 - X0Y31
L [LN] (RCAL)
GTY Quad 125
X0Y24 - X0Y27
K [LN]
GTY Quad 124
X0Y20 - X0Y23
GTY Quad 123
X0Y16 - X0Y19
GTY Quad 122
X0Y12 - X0Y15
J [LS]
GTY Quad 121
X0Y8 - X0Y11
I [LS] (RCAL)
GTY Quad 120
X0Y4 - X0Y7
H [LS]
GTY Quad 119
X0Y0 - X0Y3
CMAC
X0Y5
PCIE4
X0Y3
CMAC
X0Y4
CMAC
X0Y3
ILKN
X0Y3
CMAC
X0Y2
PCIE4
X0Y1
CMAC
X0Y1
CMAC
X0Y0
ILKN
X0Y0
HP I/O Bank 48
M
HP I/O Bank 47
L
HP I/O Bank 46
K
HP I/O Bank 45
J
HP I/O Bank 44
HP I/O Bank 43
I
HP I/O Bank 42
H
HP I/O Bank 41
G
HP I/O Bank 40
F
HP I/O Bank 39 HP I/O Bank 59
HP I/O Bank 60
HP I/O Bank 61
HP I/O Bank 62
HP I/O Bank 63
HP I/O Bank 64
B
HP I/O Bank 65
C
HP I/O Bank 66
D
HP I/O Bank 67
E
HP I/O Bank 68
ILKN
X1Y5
ILKN
X1Y4
SYSMON
Configuration
PCIE4
X1Y2
(Tandem)
Configuration
ILKN
X1Y2
ILKN
X1Y1
SYSMON
Configuration
PCIE4
X1Y0
Configuration
GTY Quad 228
X1Y36 – X1Y39
GTY Quad 227
X1Y32 – X1Y35
D [RS]
GTY Quad 226
X1Y28 – X1Y31
C [RS] (RCAL)
GTY Quad 225
X1Y24
– X1Y27
B [RS]
GTY Quad 224
X1Y20
– X1Y23
A {RS]
GTY Quad 223
X1Y16 – X1Y19
GTY Quad 222
X1Y12
– X1Y15
GTY Quad 221
X1Y8
– X1Y11
(RCAL)
GTY Quad 220
X1Y4 – X1Y7
GTY Quad 219
X1Y0
– X1Y3
QSFP-DD 2 lanes 4 - 7
QSFP-DD 2 lanes 0 - 3
QSFP-DD 3 lanes 4 - 7
QSFP-DD 3 lanes 0 - 3
QSFP-DD 1 lanes 0 - 3
QSFP-DD 0 lanes 0 - 3
PCIe Edge (lanes 0 to 3)
PCIe Edge (lanes 4 to 7)
OpenCAPI (lanes 4 to 7)
OpenCAPI (lanes 0 to 3)
PCIE_LCL_REFCLK
CAPI_CLK_2
1
0
1
0
0
SI5328_1_OUT_1
CAPI_CLK_1
PCIE_REFCLK
MGT_PROG CLK_0
SI5328_0_OUT_0 1
0
1
0 MGT_PROGCLK_2
SI5328_1_OUT_0
Key:
Unbonded (not connected t o package pins)
SLR Crossing
GTY Quad 133
X0Y56 - X0Y59
GTY Quad 131
X0Y48 - X0Y51
(RCAL)
GTY Quad 130
X0Y44 - X0Y47
GTY Quad 129
X0Y40 - X0Y43
CMAC
X0Y8
PCIE4
X0Y5
CMAC
X0Y7
CMAC
X0Y6
ILKN
X0Y6
HP I/O Bank 53
HP I/O Bank 52
HP I/O Bank 51
HP I/O Bank 50
HP I/O Bank 49 HP I/O Bank 69
HP I/O Bank 70
N
HP I/O Bank 71
O
HP I/O Bank 72
P
HP I/O Bank 73
Q
ILKN
X1Y8
ILKN
X1Y7
SYSMON
Configuration
PCIE4
X1Y4
Configuration
GTY Quad 233
X1Y56
– X1Y59
G [RN]
GTY Quad 232
X1Y52
– X1Y55
F [RN]
GTY Quad 231
X1Y48 – X1Y51
E [RN] (RCAL)
GTY Quad 230
X1Y44
– X1Y47
GTY Quad 229
X1Y40
– X1Y43
QSFP-DD 0 lanes 4 - 7
QSFP-DD 1 lanes 4 - 7
FireFly (al l 4 lanes)
SI5328_0_OUT_1
MGT_PROG CLK_1
1
0
Figure 11 : VU9P FPGA Clock Location
Page 11 Functional Description
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