Albalá Ingenieros DAT3000C01, Руководство пользователя, Страница: 22 / 38

Albalá Ingenieros | Manual DAT3000C01
digital servo that calculates the ratio within fractions of a second. Once the ratio has
been determined, the integrated circuit performs the change in sampling frequency
as long as the difference between the input and output sampling frequencies is no
more than two cycles. If this threshold is exceeded, the digital servo must refresh its
registers for the new input-to-output sampling frequency ratio.
The AES/EBU output signal sampling frequency is locked to the frequency of the
reference signal and can be any of the standard sampling values: 32, 44.1, 64, 88.2 or
96kHz. When a non-standard frequency is required then varispeed mode must be
used. If higher sampling frequencies are required at the output (64 to 192kHz) then
double frequency mode must be used.
When the DAT3000C01 is used purely as a line delayer the frequency conversion can
be disabled, providing the complete signal quality from the input to the output. This
disabling can be done using the control software via a communications controller
installed in the same mounting frame as the DAT3000C01. The line delayer mode is
also useful when delaying AES/EBU streams that contain data instead of audio
signals.
If the synchronizer is not used, the reference input is disabled and each section of the
DAT3000C01 obtains its data clock from the corresponding input. In such cases the
module operates as two completely independent delayers capable of processing two
AES/EBU streams of different frequencies or even different sampling modes (normal
or double frequency).
The frequency conversion process is not instantaneous due to the need for digital
filters. The audio delay between the input and the output is always less than 1.5ms as
long as the delay input is set to its minimum value.
4.2.2. Description of the delay line
The DAT3000C01 is capable of introducing a delay that can be independently adjusted
for each of the two digital audio input streams. This delay is always performed in
steps of one sample at the sampling frequency and the duration of the delay depends
upon the memory in the module and on the sampling frequency itself.
The delay can be adjusted with either the front panel pushbuttons or using the
control software and a communications controller installed in the same mounting
frame as the DAT3000C01.
The external delay reference input (TTL DELAY) allows the addition of a variable delay.
When no signal is connected to this input, the added delay is 0ms. The calculation of
the variable delay is performed by measuring the time period that the delay signal
stays at a logic high or at a logic low. The selection of which logic level to use is done
via the control software. The module comes from the factory programmed to use the
logic high time period of the delay signal.
The total maximum achievable delay for each stream, consisting of the programmed
delay plus the variable delay, depends upon the output sampling frequency as
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