Aim ANET1553-1, Руководство пользователя

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ANET1553 Users Manual 1
1
INTRODUCTION
1.1 General
This document comprises the Hardware User’s Manual for the ANET1553-1/-2
standalone Ethernet based module. The document covers the hardware and software
installation, the board connections, the technical data and a general description of the
hardware architecture. For programming information please refer to the documents
listed
in the ‘Applicable Documents’ section.
The ANET1553 modules are members of AIM's new family of advanced Ethernet
connected standalone modules for analyzing, simulating, monitoring and testing of
avionic data bus systems.
The ANET1553 modules are used to simulate, monitor and inject protocol errors of
MIL-STD-1553A/B based data bus systems. The ANET1553 offers an interface for up to
two dual-redundant MIL-STD-1553 bus channels. Furthermore the interface implements
trigger IN/OUT functions, as well as 8 user definable Discrete I/O signals.
An freewheeling IRIG-B-122 compatible time code Encoder/Decoder allows the user to
synchronize to either the self-generated time code or the time code of an external board
with a resolution of 1µsec, to satisfy the requirements of 'multi-channel time tag
synchronization' on system level.
The ANET1553 module is designed as a standalone module connected with an
Ethernet link to a host computer. An external power supply (wall adapter) is used to
power the ANET module.
D
ifferent coupling modes such as “Transformer Coupling”, “Network Emulation” and
“Direct Coupling” are available for each MILBus channel and can be programmed using
the on board relays. The MILBus Signals are connected to Twinax connectors.
The hardware architecture provides ample resources (i.e. processing capability and
memory) to guarantee, that all specified interface functions are available concurrently
and to full performance specifications.
The key components of the ANET1553 are the FPGA (which includes the 1553 core,
the Processor-I/F, the Global RAM I/F), the BIU-Processor and the on board
Application Support Processor (ASP) which is based on a System-On-Chip (SOC)
hardware and running under an embedded LINUX Operating System.
The SOC hardware offers a built-in 10/100Mbit/s Ethernet interface, which is used for
the implementation of the host connection via a Standard Ethernet RJ-45 connector.
Furthermore the SOC also offers a built-in USB interface, which has been made
available to the user for mounting external mass data storage devices or use an
optional WLAN stick for wireless Ethernet operation
With 128MB Global RAM (shared between BIU, HOST and ASP) and 256MB of ASP
Local RAM plus 1GB of ASP Flash memory, the ANET1553 Design offers enough
memory resources for various use cases and applications.