ANET1553 Users Manual
49
9
NOTES
9.1 Acronyms
ASP
Application Support Processor
BIP
Bus Interface Processor
BIU
Bus Interface Unit
BM
Bus Monitor
BSP
Board Software Package
DHCP
Dynamic Host Configuration Protocol (DHCP)
DDRRAM
Double Data Rate Random Access Memory
DRAM
Dynamic Random Access Memory
EEPROM
Electrically Erasable and Programmable Read Only Memory
FLASH
Page oriented electrical erasable and programmable memory.
FPGA
Field programmable gate array
FW
Firmware
GND
Ground
IRIG B
Inter Range Instrumentations Group Time code Format Type B
I/O
Input / Output
IP
Internet Protocol
JTAG
Joint Test Action Group (IEEE 1149.1 Boundary Scan)
LCA
Logic Cell Array (XILINX - Programmable Gate Array)
LED
Light-emitting Diode
LVTTL
Low Voltage TTL
MIL-STD
Military Standard
MILbus
MIL-STD-1553 bus
OS
Operating System
PBI
Physical Bus Interface
PROM
Programmable Read Only Memory
PCI
Peripheral Component Interconnect
PCIe
Peripheral Component Interconnect Express
RAM
Random Access Memory
RISC
Reduced Instruction Set Computer
RS232
Hardware Interface Protocols
SOC
System On Chip
SMD
Surface Mounted Device
SRAM
Static Random Access Memory
SSRAM
Synchronous Static Random Access Memory
TCP
Time Code Processor
UART
Universal Asynchronous Receiver and Transmitter
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