A16 Address Space
Inside the
Command Module
or Mainframe
When the A16 address space is inside the command module or mainframe
(Figure B-2), the multiplexer’s base address is computed as:
1FC000
16
+ (LADDR * 64)
16
or
2,080,768 + (LADDR * 64)
where 1FC000
16
(2,080,768) is the starting location of the VXI A16
addresses, LADDR is the multiplexer’s logical address, and 64 is the
number of address bytes per register-based device. Again, the multiplexer’s
factory set logical address is 112. If this address is not changed, the
multiplexer will have a base address of:
1FC000
16
+ (112 * 64)
16
1FC000
16
+ 1C00
16
= 1FDC00
16
or
2,080,768 + (112 * 64)
2,080,768 + 7,168 = 2,087,936
Register Offset
The register offset is the register’s location in the block of 64 address bytes.
For example, with a LADDR of 112 the multiplexer’s Scan Channel Delay
Register has an offset of 08
16
. When you write a command to this register,
the offset is added to the base address to form the register address:
0816 = DC08
16
(A16 outside the command module)
1FDC00
16
+ 08
16
= 1FDC08
16
(A16 inside the command module)
or
56,320 + 8 = 56,328
(A16 outside the command module)
2,087,936 + 8 = 2,087,944
(A16 inside the command module)
122 Strain Gage Register-Based Programming
Appendix D
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