Advantech SKY-8101, Руководство пользователя

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SKY-8200 Manual V04 20180321 Copyright 2016 Advantech Co. Ltd. All rights reserved. Page 47
2.4.6.2 DDR4 DIMM Location and SMBus Mapping
Table 2-12: Intel® Xeon® Processor DDR4 DIMM SMBus Address List
Location CPU/Channel H/W Address Device Address
D1 CPU1 / F
SA[2:0]=”100” 1010 101x (A8)
D2 CPU1 / E
SA[2:0]=”010”
1010 100x (A4)
D3
CPU1 / D
SA[2:0]=”000”
1010 001x (A0)
D4 CPU1 / A
SA[2:0]=”000”
1010 000x (A0)
D5 CPU1 / B
SA[2:0]=”010”
1010 100x (A4)
D6 CPU1 / C
SA[2:0]=”100”
1010 000x (A8)
D1 D2 D3 D4 D5 D6
Figure 2-13: DIMM and CPU Location
2.4.6.3 Validated Memory Modules
The following list summarizes the modules validated on the SKY-8101S:
Table 2-13: Validated DIMMs
Vendor P/N Capacity Speed / Architecture
Micron 96D4-32G2666ER-MI 32G DDR4-2666