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ADLINK Technology PCIe-7256 Скачать руководство пользователя страница 6

vi

Table of Contents

3.7

Interrupt Control Register................................................... 16

3.8

Interrupt Status Register .................................................... 18

AppendixA

C/C++ DOS Function Library ...................... 21

A.1

Data Types......................................................................... 21

A.2

List of Functions................................................................. 21

_7256_COS_Channel ................................................... 21
_7256_CLR_IRQ .......................................................... 22
_7256_COS_Latch ....................................................... 22
_7256_DI ...................................................................... 23
_7256_DO .................................................................... 23
_7256_DO_Read_Back ................................................ 24
_7256_GET_IRQ_Status .............................................. 24
_7256_Initial ................................................................. 25
_7256_INT_Control ...................................................... 25

Important Safety Instructions.............................................. 27

Getting Service ..................................................................... 29

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Содержание PCIe-7256

Страница 1: ...Advance Technologies Automate the World Manual Rev 2 00 Revision Date Jan 7 2016 Part No 50 11043 1000 PCIe 7256 16CH Latching Relay Output 16CH Isolated DI Card...

Страница 2: ...ii Revision History Revision Release Date Description of Change s 2 00 Jan 7 2016 Initial release...

Страница 3: ...f advised of the possibility of such damages Environmental Responsibility ADLINK is committed to fulfill its social responsibility to global environmental preservation through compliance with the Euro...

Страница 4: ...NOTE Additional information aids and tips that help users perform tasks CAUTION Information to prevent minor physical injury component dam age data loss and or program corruption when trying to com pl...

Страница 5: ...t 3 PCIS DASK 3 1 5 PCB Layout 4 1 6 Connectors 5 1 7 External LED Connection 7 2 Getting Started 9 2 1 Unpacking Checklist 9 2 2 Installing the Card 9 2 3 Setting Jumpers 10 2 4 Setting Board ID 11 3...

Страница 6: ...dixA C C DOS Function Library 21 A 1 Data Types 21 A 2 List of Functions 21 _7256_COS_Channel 21 _7256_CLR_IRQ 22 _7256_COS_Latch 22 _7256_DI 23 _7256_DO 23 _7256_DO_Read_Back 24 _7256_GET_IRQ_Status...

Страница 7: ...t of Figures vii PCIe 7256 List of Figures Figure 1 1 PCIe 7256 Board Layout 4 Figure 1 2 PCIe 7256 CN1 Connector 5 Figure 1 3 External LED Connectors 7 Figure 2 1 Default Input Signal Jumper Settings...

Страница 8: ...viii List of Figures This page intentionally left blank...

Страница 9: ...ist of Tables ix PCIe 7360 List of Tables Table 1 1 PCIe 7256 Board Layout Legend 4 Table 1 2 PCIe 7256 CN1 Pin Assignment 6 Table 2 1 Board ID Setting Conditions 12 Table 3 1 PCIe 7256 Register Map 1...

Страница 10: ...x List of Tables This page intentionally left blank...

Страница 11: ...the external event Latching relays conserve power and the status of each latching relay output is indicated by LED such that when the latching relay is SET its corresponding onboard LED is lit Also e...

Страница 12: ...channels 16 Photocoupler PC 3H4 Input current X 10 mA rated X 50 mA max for isolated input Input voltage X Up to 24V DC or 24V AC X Logic Low 0 to 2V X Logic High 5 to 24V Input impedance 4 7 k Input...

Страница 13: ...r customized DAQ application development enabling Life expectancy min operations X 2x 105 times at 30V DC 1A X 105 times at 125V AC 0 5A Vibration resistance 176 4m s2 18G 10 to 55Hz at double amplitu...

Страница 14: ...8 1 OS 1 5 PCB Layout Figure 1 1 PCIe 7256 Board Layout Table 1 1 PCIe 7256 Board Layout Legend NOTE NOTE All dimensions shown are in mm Name Description A JP4 External LED connector setting B JP3 Ex...

Страница 15: ...roduction 5 PCIe 7256 1 6 Connectors The PCIe 7256 is equipped with a 68 pin SCSI connector CN1 Figure 1 2 PCIe 7256 CN1 Connector ID Pin Pin ID NO15 68 34 NO7 COM15 67 33 COM7 NC15 66 32 NC7 1 34 35...

Страница 16: ...58 24 COM4 NC12 57 23 NC4 NO11 56 22 NO3 COM11 55 21 COM3 NC11 54 20 NC3 NO10 53 19 NO2 COM10 52 18 COM2 NC10 51 17 NC2 NO9 50 16 NO1 COM9 49 15 COM1 NC9 48 14 NC1 NO8 47 13 NO0 COM8 46 12 COM0 NC8 45...

Страница 17: ...assis panel or other appara tus Only LEDs with forward voltage Vf lower than 2V can func tion Each external LED connector has a current limiting resistor 330 connecting with 3 3 V power eliminating th...

Страница 18: ...8 Introduction This page intentionally left blank...

Страница 19: ...e you install the card into your com puter system See Software Support on page 3 for driver sup port information To install the card 1 Turn off the system chassis and disconnect the power plug from th...

Страница 20: ...r if you experience erratic operation with your PCI PCIE Express card in place an interrupt conflict may have been generated such as when the BIOS Setup is incor rectly configured Refer to the system...

Страница 21: ...cific cards can be a problem The PCIe 7256 provides Board ID function in which according to settings of a DIP switch located in S1 ID is directly assigned to specific cards providing error free access...

Страница 22: ...e 2 1 Board ID Setting Conditions Board ID Switch 1 2 3 4 0 1 1 1 1 1 0 1 1 1 2 1 0 1 1 3 0 0 1 1 4 1 1 0 1 5 0 1 0 1 6 1 0 0 1 7 0 0 0 1 8 1 1 1 0 9 0 1 1 0 10 1 0 1 0 11 0 0 1 0 12 1 1 0 0 13 0 1 0...

Страница 23: ...Relay Output Control Register The 16 latching relays are each controlled by two bits of the con trol register Setting 0 1 indicates the latching relay is in RESET under which normal open NO signal li...

Страница 24: ...e relay is in SET the corresponding bit value is 1 Address BASE 0x02 Attribute Read DIx isolated digital input channel x x 0 15 1 input voltage high 0 input voltage is low 7 6 5 4 3 2 1 0 DO3_S DO3_R...

Страница 25: ...n any one digital input channel enabling monitoring of input channel status Enabling the COS Setup registers generates an interrupt when the corresponding channel changes state whether rising edge sig...

Страница 26: ...COS interrupt function is enabled to mon itor the enabled input channel s status whenever the status changes from 0 to 1 or 1 to 0 In a second mode digital input channel 0 channel 1 or both can be se...

Страница 27: ...clear DI channel 0 interrupt 0 no effect CH1 CLR bit 2 write 1 to clear DI channel 1 interrupt 1 clear DI channel 1 interrupt 0 no effect COS Int_EN bit 8 Write Read Change of State interrupt enable...

Страница 28: ...ndition Address BASE 0x08 Attribute Read Interrupt Bit 10 Bit 9 Bit 8 IRQ Source IRQ Trigger Condition Disable 0 0 0 Interrupt disable Mode 1 0 0 1 COS interrupt Change of state in enabled channel Mod...

Страница 29: ...1 COS interrupt asserts CH0 Int Status bit 1 Digital input channel 0 interrupt status 0 Ch0 interrupt de asserts 1 Ch0 interrupt asserts CH1 Int Status bit 2 Digital input channel 1 interrupt status...

Страница 30: ...20 Register Format This page intentionally left blank...

Страница 31: ...to 255 I16 16 bit signed integer 32768 to 32767 U16 16 bit unsigned integer 0 to 65535 I32 32 bit signed integer 2147483648 to 2147483647 U32 32 bit single precision floating point 0 to 4294967295 F32...

Страница 32: ...est Syntax U16 _7256_CLR_IRQ U16 boardID U16 COS_CLR U16 CH0_CLR U16 CH1_CLR Argument boardID Board ID to the specific board COS_CLR Write 1 to clear COS interrupt request and 0 with no effect CH0_CLR...

Страница 33: ...Returns 16 bit value from digital input port Return Code ERR_NoError ERR_BoardNoInit _7256_DO Writes data to the digital output port energizing the Latch ing relay SET RESET coils All 16 relays can b...

Страница 34: ...Code ERR_NoError ERR_BoardNoInit _7256_GET_IRQ_Status Acquires current interrupt status Syntax U16 _7256_GET_IRQ_Status U16 boardID U16 COS_Status U16 CH0_Status U16 CH1_Status Argument boardID Board...

Страница 35: ...us plug and play initial ization information as defined by p p BIOS PCI_INFO structure is defined in ACL_PCI H and base I O address and interrupt channel number are stored in pciinfo for refer ence Re...

Страница 36: ...NoInit ERR_INTNotSet CH1_Enable CH0_Enable COS_Enable IRQ Source IRQ Trigger Condition 0 0 0 Interrupt disable 0 0 1 COS interrupt Change of state in the enabled channel 0 1 0 Ch 0 interrupt enable Ri...

Страница 37: ...urn off power and unplug any power cords cables X To avoid electrical shock and or damage to equipment Z Keep equipment away from water or liquid sources Z Keep equipment away from high heat or high h...

Страница 38: ...iced by authorized technicians when Z The power cord or plug is damaged Z Liquid has penetrated the equipment Z It has been exposed to high humidity moisture Z It is not functioning or does not functi...

Страница 39: ...el 86 21 5132 8988 Fax 86 21 5132 3588 Email market adlinktech com ADLINK Technology Beijing Address 1 E 801 100085 Rm 801 Power Creative E No 1 Shang Di East Rd Beijing 100085 China Tel 86 10 5885 86...

Страница 40: ...5 Fax 82 2 2057 0563 Email korea adlinktech com ADLINK Technology Singapore Pte Ltd Address 84 Genting Lane 07 02A Cityneon Design Centre Singapore 349584 Tel 65 6844 2261 Fax 65 6844 2263 Email singa...

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