ADLINK Technology NuDAQ cPCI-7249R, Руководство пользователя, Страница: 4 / 74

iv Table of Contents
72XX Series

User’s Manual
2.6.2 cPCI-7248 Pin Assignment ................................................. 16
2.6.3 cPCI-7249R Pin Assignment .............................................. 17
2.6.4 R7249 OPTO-22 Connectors.............................................. 18
2.7 Jumpers Description .......................................................... 19
2.7.1 Power on Status of Ports .................................................... 19
2.7.2 12V Power Supply Configuration ........................................ 20
2.8 Termination Boards Connection ........................................ 21
3 Registers Format .............................................................. 23
3.1 PCI Plug and Play Registers.............................................. 23
3.2 I/O Address Map ................................................................ 24
4 Operation Theory .............................................................. 25
4.1 Digital I/O Ports.................................................................. 25
4.1.1 Introduction ......................................................................... 25
4.1.2 8255 Mode 0 ....................................................................... 25
4.1.3 Special Function of the DIO Signals ................................... 25
4.1.4 Digital I/O Port Programming .............................................. 26
4.1.5 Control Word....................................................................... 27
4.1.6 Power On Configuration...................................................... 28
4.1.7 Note for Output Data........................................................... 28
4.1.8 Note for cPCI-7249R........................................................... 28
4.2 Timer/Counter Operation ................................................... 29
4.2.1 Introduction ......................................................................... 29
4.2.2 General Purpose Timer/Counter......................................... 30
4.2.3 Cascaded 32 Bits Timer...................................................... 30
4.2.4 Event Counter and Edge Control ........................................ 30
4.3 Interrupt Multiplexing.......................................................... 31
4.3.1 Architecture......................................................................... 31
4.3.2 IRQ Level Setting................................................................ 31
4.3.3 Note for Dual Interrupts....................................................... 32
4.3.4 Interrupt Source Control...................................................... 32