Rev. 1.43
User's
Guide
71
4.9.3. Transceivers operations
Each transceiver has many registers to handle Fast Ethernet operation.
These registers are accessed with set of command on the MII bus.
Commands must use a serial format starting with an idle pattern that is a series of at least 32 1's of
data, with clock pulses having at least 400ns period.
The frame then starts with 0101 for a Write, or 0110 for Read,
The next 5 bits are PHY address.
The next 5 bits are register address select bits.
The next 1 bit is a turnaround bit which is not an actual register bit but extra time to switch MDIO from
write to read if necessary.
The final 16 bits are the register data. They are then sent, most significant bit first.
Data are TTL positive logic, and are set by the master near to the negative transition of the clock and
sampled on the positive clock edge. Data are returned from the slave up to 300ns after the positive
edge of the clock, and can be sampled by the master just before it sets the clock high for the
subsequent pulse.
It is recommended that all the procedures listed below should start with the following two step
sequence, especially during initialization time:
-
Reset PHY by writing 8000h to PHY register 0.
-
Poll bit 15 (
Reset
) in PHY register 0 until it is 0 for the reset completion. Timeout and report
failure if it takes longer than 0.5 seconds.
Static 10BaseT Half duplex configuration:
1. Write 0000h to PHY register 0.
2. Set the duplex configuration of the MAC accordingly.
Static 100BaseTX Full duplex configuration:
1. Write 2100h to PHY register 0.
2. Set the duplex configuration of the MAC accordingly.
Here follows the description of the most used registers.
PHY register address 0:
Control Register
Bit
NAME
DESCRIPTION
R/W
DEFAULT
15
Reset
1 = reset all register bits to defaults
0 = normal
R/W,
SC
0
14
Loopback
1 = loopback mode enabled
0 = normal
R/W 0
13
Speed select
1 = 100Mb/s
0 = 10Mb/s
R/W 1
12
Auto negotiation
1 = auto negotiation enabled
0 = normal
R/W 1
11
Power down
1 = power down active
0 = normal
R/W 0
10
MII disable
1 = MII interface disabled
0 = normal operation
R/W 0
9
Restart auto negotiation
1 = restart auto negotiation
0 = normal
R/W,
SC
0
8
Duplex mode
1 = Full duplex mode
0 = Half duplex mode
R/W 0
7
Collision Test
1 = enable COL signal test
0 = normal
R/W 0
6:0 Reserved
Reserved
R/W 0
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