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AcroPack Series XMCAP2022

XMC Carrier Board

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and only supplied when The Present* Pin (45) of the AcroPack module is seen to
be grounded.

4.

All +3.3Vaux power pins are changed to 3.3V power.

5.

The SM bus signals SMB_CLK and SMB_DATA are used to communicate with a
CPLD on the carrier that reports slot ID. These signals will be under the control of
the AcroPack module.

XMC/PCIe Bus Connections

Table4 indicates the pin assignments for the PCIe bus signals at the XMC VITA
42.3 connector P15.

Refer to the PCI Express bus specification for additional information on the
PCI Express bus signals.

Table 4 XMC/PCIe Bus P15 CONNECTIONS

A

B

C

D

E

F

1

PETX0_P

PETX0_N

+3.3V

PETX1_P

PETX1_N

VPWR

2

GND

GND

No Connect

GND

GND

PERST*

3

PETX2_P

PETX2_N

+3.3V

PETX3_P

PETX3_N

VPWR

4

GND

GND

TCK

GND

GND

No Connect

5

PETX4_P

PETX4_N

+3.3V

PETX5_P

PETX5_N

VPWR

6

GND

GND

TMS

GND

GND

+12V_AUX (NC)

3

7

PETX6_P

PETX6_N

+3.3V

PETX7_P

PETX7_N

VPWR

8

GND

GND

TDI

GND

GND

-12V_AUX (NC)

3

9

No Connect

No Connect

No Connect

No Connect

No Connect

VPWR

10

GND

GND

TDO

GND

GND

GA0

11

No Connect

No Connect

No Connect

No Connect

No Connect

VPWR

12

GND

GND

GA1

GND

GND

GND

13

No Connect

No Connect

+3.3V_AUX (NC)

2

No Connect

No Connect

VPWR

14

GND

GND

GA2

GND

GND

No Connect

15

No Connect

No Connect

No Connect

No Connect

No Connect

VPWR

16

GND

GND

MVMRO*

GND

GND

No Connect

17

No Connect

No Connect

No Connect

No Connect

No Connect

No Connect

18

GND

GND

No Connect

GND

GND

No Connect

19

REFCLK_P

REFCLK_N

No Connect

No Connect

No Connect

No Connect

Notes:

1.

Asterisk (*) is used to indicate an active-low signal.

2.

+3.3Vaux power is not used by the carrier. Contact Acromag to 3.3Vaux
power to AcroPack modules and/or ID EEPROM. The carrier pr3.3V
power to the modules.

3.

+12V_AUX and -12V_AUX are not used by the carrier. +12V and -12V are created
from +3.3V to support XMC carriers that do not supply these voltages.

JTAG Programming/Debug Connector

JTAG programming/debug is supported through the JTAG signals of the XMC
P15 connector. An alternate header is supplied if JTAG is not available from
the XMC carrier (See reference designator J3 located on bottom side of

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Содержание XMCAP2022

Страница 1: ...For ARCX Applications USER S MANUAL ACROMAG INCORPORATED 30765 South Wixom Road Wixom MI 48393 2417 U S A Tel 248 295 0310 Copyright 2019 Acromag Inc Printed in the USA Data and specifications are sub...

Страница 2: ...8 ACROPACK HEATSINKING 8 ACROPACK MODULE INSTALLATION 9 FIELD GROUNDING CONSIDERATIONS 10 CONNECTORS 10 Rear Field I O Connectors 10 AcroPack Field I O Connectors 11 ARCX 4000 Series Cross Reference...

Страница 3: ...R 27 PCIe BUS COMPLIANCE 28 ENVIRONMENTAL 28 EMC Compliance 28 Vibration and Shock Standard 28 Reliability Prediction 29 7 APPENDIX A 30 Heatsink Installation 30 8 APPENDIX B 31 XMCAP202x Module Insta...

Страница 4: ...hts reserved Acromag and Xembedded are registered trademarks of Acromag Incorporated All other trademarks registered trademarks trade names and service marks are the property of their respective owner...

Страница 5: ...mber can be set for each AcroPack site automatically by geographical address bits or by DIP switch This feature provides the capability to distinguish a particular AcroPack module from others when mul...

Страница 6: ...s unless the device is contained within its original manufacturer s packaging Be aware that failure to comply with these guidelines will void the Acromag Limited Warranty UNPACKING AND INSPECTION Upon...

Страница 7: ...er supplies are able to accommodate the power requirements of the carrier board plus the installed AcroPack modules within the voltage tolerances specified IMPORTANT Adequate thermos conduction must b...

Страница 8: ...o select address bits A3 and A4 Figure 1 shows the location of switch SW1 Set the switch state as shown in Table 1 below to assign a unique slot address to this carrier Table 1 Switch SW1 assignments...

Страница 9: ...at shown in the figure Next using a rocking motion while gently applying force to keep the edge of the board against the back of the carrier connector position the module such that the field I O conne...

Страница 10: ...hat could be used to interface to the AcroPack input output modules CONNECTORS The XMCAP2022 carrier uses two AcroPack module field I O connectors two mini PCIe connectors two field I O connectors rea...

Страница 11: ...eld I O Pin Assignments AcroPack A XMCAP2022 Rear I O Connection Site A P16 XMCAP2022 Rear I O Connection Site A P14 Carrier P1 P2 Samtec SS5 50 3 00 L D K TR Module Pin Number Field A I O Signal C3 2...

Страница 12: ...33 Field A I O 18 36 36 Reserved isolation 35 35 Reserved isolation F3 38 38 Field A I O 19 F2 37 37 Field A I O 20 40 40 Reserved isolation 39 39 Reserved isolation F11 42 42 Field A I O 21 F10 41 41...

Страница 13: ...70 Field A I O 35 C14 69 69 Field A I O 36 72 72 Reserved isolation 71 71 Reserved isolation F15 74 74 Field A I O 37 F14 73 73 Field A I O 38 76 76 Reserved isolation 75 75 Reserved isolation 59 78...

Страница 14: ...nnection Site B P14 Carrier P1 P2 Samtec SS5 50 3 00 L D K TR Module Pin Number Field B I O Signal 1 2 2 Field B I O 1 3 1 1 Field B I O 2 4 4 Reserved isolation 3 3 Reserved isolation 2 6 6 Field B I...

Страница 15: ...19 33 33 Field B I O 18 36 36 Reserved isolation 35 35 Reserved isolation 18 38 38 Field B I O 19 20 37 37 Field B I O 20 40 40 Reserved isolation 39 39 Reserved isolation 21 42 42 Field B I O 21 23 4...

Страница 16: ...34 70 70 Field B I O 35 36 69 69 Field B I O 36 72 72 Reserved isolation 71 71 Reserved isolation 37 74 74 Field B I O 37 39 73 73 Field B I O 38 76 76 Reserved isolation 75 75 Reserved isolation 38...

Страница 17: ...Table below is a cross reference for the ARCX box connections Pin 38999 J3 J5 Pin PMC J14 J24 Pin XMC J16 J26 XMCAP2022 Signal Name 1 1 Field B I O 1 2 3 Field B I O 2 3 2 Field B I O 3 4 4 Field B I...

Страница 18: ...29 35 31 Field B I O 30 36N A N A 37 30 Field B I O 31 38 32 Field B I O 32 39N A N A 40N A N A 41 33 Field B I O 33 42 35 Field B I O 34 43 34 Field B I O 35 44 36 Field B I O 36 45N A N A 46N A N A...

Страница 19: ...73 59 Field A I O 39 74N A N A 75 58 Field A I O 33 76 60 Field A I O 34 77N A N A 78 61 Field A I O 48 79 63 Field A I O 47 80N A N A 81 62 Field A I O 25 82 64 Field A I O 26 83N A N A 84 C19 Field...

Страница 20: ...C8 Field A I O 18 110 N A N A 111 F9 Field A I O 24 112 F8 Field A I O 23 113 N A N A 114 C7 Field A I O 13 115 C6 Field A I O 14 116 N A N A 117 F7 Field A I O 7 118 F6 Field A I O 8 119 N A N A 120...

Страница 21: ...2 N C LED_WWAN 1 39 3 3V4 40 GND 37 GND 38 N C USB_D 1 35 GND 36 N C USB_D 1 33 PETX0_P 34 GND 31 PETX0_N 32 SMB_DATA5 29 GND 30 SMB_CLK5 27 GND 28 1 5V 25 PERX0_P 26 GND 23 PERX0_N 24 3 3V4 21 GND 22...

Страница 22: ...nnect No Connect No Connect No Connect No Connect VPWR 10 GND GND TDO GND GND GA0 11 No Connect No Connect No Connect No Connect No Connect VPWR 12 GND GND GA1 GND GND GND 13 No Connect No Connect 3 3...

Страница 23: ...when accessing the FPGAs on the AcroPack modules Table 1 JTAG Programming Debug Connector J3 Pin Assignment Signal Pin TDI 1 TDO 2 GND 3 TCK 4 TMS 5 VREF 3 3V 6 Notes TMS JTAG Test Mode Select This pi...

Страница 24: ...port to two ports one for each AcroPack site The host port consists of four PCIe lanes each of the AcroPack sites have one lane each Important Note The XMCAP2022 board is not hot swappable DC DC CONV...

Страница 25: ...with a Xilinx Platform USB II programming device A bypass circuit is included that will detect a vacant AcroPack site and close a switch to complete the JTAG chain The slot address CPLD is included f...

Страница 26: ...followed Also refer to the documentation of your carrier board to verify that it is correctly configured Verify that there are no blown fuses Replacement of the carrier and or AcroPack with one that...

Страница 27: ...G 6 pin micro connector Molex 78171 5006 POWER Board power requirements are a function of the installed AcroPack modules The current specified below is for the XMCAP2022 carrier board only 3 3 Volts 5...

Страница 28: ...re 55 to 125 C EMC Compliance The XMCAP2022 is designed to comply with EMC Directive 2004 108 EC Immunity per EN 61000 6 2 Electrostatic Discharge Immunity ESD per IEC 61000 4 2 Radiated Field Immunit...

Страница 29: ...ediction MTBF Mean Time Between Failure MTBF in hours using MIL HDBK 217F FN2 Per MIL HDBK 217 Ground Benign Controlled GBGC Temperature MTBF Hours MTBF Years Failure Rate FIT1 25 C 1 676 654 191 4 59...

Страница 30: ...eneric XMC heatsink and install a custom XMCAP202x heatsink 1 Refer to the ARCX box disassembly instructions found in the ARCX box manual to remove the assembly from its enclosure 2 Remove the XCOM 64...

Страница 31: ...sink 4 Install the custom heatsink as shown using the 4 screws provided 8 APPENDIX B XMCAP202x Module Installation The following instructions describe how to install an XMCAP202x into an ARCX box It i...

Страница 32: ...n below these standoffs should already be installed on the ARCX carrier board 2 Install the XMCAP202x on the carrier as shown below using the 4 screws provided 3 Installation is complete Refer to the...

Страница 33: ...d Yes No Non Volatile Memory Does this product contain Non Volatile memory i e Memory of whose contents is retained when power is removed Yes No Type EEPROM FLASH etc Size User Modifiable Function Pro...

Страница 34: ...UN 2018 ENZ Prelim AcroPack A pinout revised 31 JUL 2018 ENZ Prelim pinout to 38999 revised board configuration drawing updated and block diagram added 3 JAN 2019 A ENZ ARP Added heatsink information...

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