All start and directional outputs are mapped to the logical node data model of the
trip function and provided via the IEC 61850 attributes dirGeneral, DIRL1, DIRL2,
DIRL3 and DIRN.
9.1.2.6
Blocking of the function block
M14828-21 v4
Total block of the trip function is done by activating the input BLOCK and can be
used to disable the outputs of the trip logic in the event of internal failures. Block
of lock-out output is achieved by activating the input BLKLKOUT.
9.1.3
Setting guidelines
M12274-3 v8
The parameters for tripping logic SMPPTRC are set via the local HMI or PCM600.
Operation
: Sets the mode of operation.
Off
switches the tripping off. The normal
selection is
On
.
Program
: Sets the required tripping scheme. Normally
3 phase
or
1ph/3ph
is used.
TripLockout
: Sets the scheme for lock-out.
Off
only activates the closing circuit
lock-out output.
On
activates the closing circuit lock-out output and latches the
TRIP related outputs. The normal selection is
Off
.
AutoLock
: Sets the scheme for lock-out.
Off
only activates lock-out through the
input SETLKOUT.
On
additionally allows lock-out activation via the trip inputs.
The normal selection is
Off
.
tTripMin
: Sets the required minimum duration of the trip pulse. It should be set to
ensure that the circuit breaker is opened correctly. The normal setting is
0.150s
.
tWaitForPHS
: Sets a duration during which external phase selection must operate
in order to get a single phase trip, after any of the inputs 1PTRZ or 1PTREF has
been activated. If no phase selection has been achieved, a three-phase trip will be
issued after this time has elapsed.
tEvolvingFault
: Secures two- or three-pole tripping depending on
Program
selection during evolving faults.
9.2
Trip matrix logic TMAGAPC
IP15121-1 v4
9.2.1
Identification
SEMOD167882-2 v3
Function description
IEC 61850
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Trip matrix logic
TMAGAPC
-
-
1MRK 511 423-UEN A
Section 9
Logic
Bay control REC650 2.2 IEC
177
Application manual
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