Publication No. 500-9300527837-000 Rev. A.0
FPGA Registers 61
C&S = Control and Status
CAUTION
These registers are intended to be accessed only by proprietary driver software.
Other access to these registers could cause the SBC347A to malfunction.
NOTE
The descriptions shown below are for reference only, and are subject to change.
6.1 Board ID Register (0x600)
This returns the value 0x85 to identify the SBC347A.
6.2 Board Revision Register (0x601)
6.3 FPGA Revision Register (0x60B)
LPC I/O Port
Description
Access
LPC I/O Port
Description
Access
0x6AA
Read only
0x6BE
Read/Write
0x6AB
Read only
0x6BF
Read/Write
0x6AC
Display-Port Display Availability
Read only
0x6C0
Read/Write
0x6AD
Read only
0x6C1
Read/Write
0x6AE
Read only
0x6C2 to 0x6C5
Reserved
0x6AF and 0x6B0 Reserved
0x6C6
Read/Write
0x6B1
Read only
0x6C7
Read only
0x6B2
SSD Secure Hardware Erase Capability
Read only
0x6C8 and 0x6C9 Reserved
0x6B3 to 0x6B7
Reserved
0x6CA
Read only
0x6B8
Read/Write
0x6CB
Read only
0x6B9 and 0x6BA Reserved
0x6CC
Read only
0x6BB
Read/Write
0x6CD
Read only
0x6BC
Read/Write
0x6CE
Read only
0x6BD
COM Port RS485 Auto Direction Control
Read/Write
0x6CF to 0x6FF
Reserved
Bits
Description
Default
7 to 4
Major assembly revision (artwork):
0x1 = Rev 1, 0x2 = Rev 2, etc.
N/A
3 to 0
Minor revision (hardware build state revision):
0x0 = Rev A, 0x1 = Rev B, etc.
N/A
Bits
Description
Default
7 to 0
Revision of FPGA code:
0x1 = Rev 1, 0x2 = Rev 2, etc.
N/A