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UM013904-0203

PRELIMINARY

Schematic Diagrams

eZ80F92 Development Kit

User Manual

Figure 26. Schematic Diagram, #5 of 9—eZ80F92 Flash Module

device addresses:
00300h bis 0030Fh

TX+ <-> 1
TX- <-> 2
RX+ <-> 3
RX- <-> 6

int. Pull-Up

yellow

90 degree,
stacked
dual-LED

ESD protection array

green

place
near
J1

through hole
solder pad

don't stuff

don't
stuff

VSS

VDD

SD0

SD1

SD2

SD3

SD4

SD5

SD6

SD7

SD[0..7]

SA0
SA1
SA2
SA3

TD-

RXD-

RD-

TXD-

TXD+

RXD+

SA[0..3]

RXD-
RXD+

TXD-
TXD+

CTD

CRD

ETHIRQ

-ETHWR

-SLEEP

-LANLED

-ACTIVE

SD[0..7]

SA[0..3]

-SLEEP

-LANLED
-LINKLED

-ETHRD

TD+

RD+

-LINKLED

RD-

TD-

-LANLED

TD+

VDD

VSS

CASE

V3.3

GND

V3.3

GND

C15

100nF

CS8900A-CQ3

TQFP100

26
27
28
29
30
31
32
33
34
35
36

100

SD4

SD5

SD6

SD7

SD0

SD1

SD2

SD3

SA17

SA18

SA19

SA13

SA14

SA15

SA16

SA0

AVSS

SA1

ELCS

SA2

EECS

SA3

EESK

SA4

EEDATAOUT (TDO)

SA5

EEDATAIN

SA6

CHIPSEL

SA7

DVSS

SA8

DVDD

SA9

DVSS

SA10

DMARQ2

SA11

DMACK2

REFRESH

DMARQ1

SA12

DMACK1

DMARQ0

DMACK0

CSOUT

SD15

SD14

SD13

SD12

DVDD

DVSS

SD11

SD10

SD9
SD8
MEMW
MEMR
INTRQ2
INTRQ1
INTRQ0
IOCS16
MEMCS16
INTRQ3
SHBE

DVSS

DVDD

DVSS

IOR

IOW

AEN (TCK)

IOCHRDY

DVDD

DVSS

RESET

TEST

SLEEP

BSTATUS/HC1

DI+

DI-

CI+

CI-

DO+

DO-

AVDD

AVSS

TXD+

TXD-

AVSS

AVDD

RXD+

RXD-

RES

AVSS

AVDD

AVSS

XTAL1

XTAL2

LINKLED/HC0

LANLED

R26
100

LCDA15C-6
SO8.150

R24

8R2

R25

8R2

C12
560pF

20.000 MHz

HC49SM

R23

4k99/1%

R22
4k7

LD2

LED ye

THT

R19

10k

HFJ11-1041
HALOFASTJACK

1
2
3
4
5
6

LD1

LED gn

THT

C13
100nF

ferrite
tbd

JP4

HEADER 1
SIP1

R34
10k
0603

R20
220
0603

R21
220
0603

C14
100nF

ETHIRQ

-ETHWR

-ACTIVE

-SLEEP

SA[0..3]

SD[0..7]

-ETHRD

IOCHRDY

Summary of Contents for eZ80F92

Page 1: ...ZiLOG Worldwide Headquarters 532 Race Street San Jose CA 95126 Telephone 408 558 8500 Fax 408 558 8300 www ZiLOG com PRELIMINARY UM013904 0203 eZ80F92 Development Kit User Manual ...

Page 2: ...003 by ZiLOG Inc All rights reserved Information in this publication concerning the devices applications or technology described is intended to suggest possible uses and may be superseded ZiLOG INC DOES NOT ASSUME LIABILITY FOR OR PROVIDE A REPRESENTATION OF ACCURACY OF THE INFORMATION DEVICES OR TECHNOLOGY DESCRIBED IN THIS DOCUMENT ZiLOG ALSO DOES NOT ASSUME LIABILITY FOR INTELLECTUAL PROPERTY I...

Page 3: ...04 0203 PRELIMINARY Safeguards iii Safeguards The following precautions must be observed when working with the devices described in this document Always use a grounding strap to prevent damage resulting from electrostatic discharge ESD Caution ...

Page 4: ...eZ80F92 Development Kit User Manual PRELIMINARY UM013904 0203 iv ...

Page 5: ...lopment Platform 7 Functional Description 7 Physical Dimensions 9 Operational Description 10 eZ80F92 Flash Module Interface 10 Application Module Interface 20 I O Functionality 23 Embedded Modem Socket Interface 28 eZ80 Development Platform Memory 30 LEDs 33 Push Buttons 33 Jumpers 34 Connectors 39 Console 40 Modem 40 I2C Devices 40 DC Characteristics 41 eZ80F92 Flash Module 43 Functional Descript...

Page 6: ...wer Supply Plug 52 ZPAKII 54 ZDI Target Interface Module 54 JTAG 54 Application Modules 54 ZDSII 56 Troubleshooting 57 Overview 57 Cannot Download Code 57 No Output on Console Port 57 IrDA Port Not Working 58 Contacting ZiLOG Customer Support 58 Schematic Diagrams 59 eZ80 Development Platform 59 eZ80F92 Flash Module 64 Appendix A 73 General Array Logic Equations 73 U10 Address Decoder 73 U15 Addre...

Page 7: ...P2 16 Figure 8 Trigger Pins J21 and J22 27 Figure 9 Embedded Modem Socket Interface J1 J5 and J9 28 Figure 10 Memory Map of the eZ80 Development Platform and eZ80F92 Flash Module 32 Figure 11 Physical Dimensions of the eZ80F92 Flash Module 44 Figure 12 eZ80F92 Flash Module Top Layer 45 Figure 13 eZ80F92 Flash Module Bottom Layer 46 Figure 14 IrDA Hardware Connections 49 Figure 15 9VDC Universal Po...

Page 8: ...hematic Diagram 2 of 9 100 Pin QFP eZ80F92 Device 65 Figure 24 Schematic Diagram 3 of 9 36 Pin SRAM Device 66 Figure 25 Schematic Diagram 4 of 9 NOR Flash Device 67 Figure 26 Schematic Diagram 5 of 9 eZ80F92 Flash Module 68 Figure 27 Schematic Diagram 6 of 9 IrDA Reset 69 Figure 28 Schematic Diagram 7 of 9 Headers 70 Figure 29 Schematic Diagram 8 of 9 Power Supply 71 Figure 30 Schematic Diagram 9 ...

Page 9: ...7 LED Anode GPIO Port A Output Control Register 24 Table 8 GPIO Data Register 25 Table 9 Bit Access to the LED Cathode Modem and Triggers 26 Table 10 Connector J5 28 Table 11 Connector J9 29 Table 12 Connector J1 29 Table 13 J2 DIS_IrDA 34 Table 14 J3 DIS_EM 35 Table 15 J7 FlashWE Off Chip 35 Table 16 J11 DIS_Flash Off Chip 36 Table 17 J12 5VDC 3 3VDC for an Embedded Modem 36 Table 18 J14 RI 37 Ta...

Page 10: ...eZ80F92 Development Kit User Manual List of Tables PRELIMINARY UM013904 0203 x ...

Page 11: ...er sized reference platform with the eZ80F92 Flash Module as a stand alone development tool 1 Kit Features The key features of the eZ80F92 Development Kit are eZ80 Development Platform Up to 2MB fast SRAM 12ns access time 1MB factory installed with 512KB on module 512KB on platform Embedded modem socket with a U S telephone line interface I2C EEPROM I2C configuration register GPIO logic circuit an...

Page 12: ...d 8KB internal SRAM 512KB off chip SRAM Real Time Clock with Battery Back Up ZPAKII Debug Interface eZ80F92 Development Kit Software and Documentation CD ROM Hardware Specifications Table 1 lists the specifications of the eZ80 Development Platform 2 Also available is the eZ80F93 microcontroller which features 64KB of internal Flash memory and 4KB of internal SRAM Please contact your local ZiLOG Sa...

Page 13: ...vide a smaller sized reference platform with the eZ80F92 Flash Mod ule as a stand alone development tool The eZ80 Development Platform is designed to accept a number of application specific modules and Z8 and eZ80 based add on modules including the eZ80F92 Flash Module which features a real time clock an IrDA transceiver and the eZ80F92 microcontroller The eZ80 Development Platform together with i...

Page 14: ...nt Platform Block Diagram with eZ80F92 Flash Module eZ80 Flash MPU Module Interface eZ80F92 Peripheral Device Signals Address Bus Data Bus RS232 0 Console RS485 LED 7x5 matrix Push buttons I C EEPROM I C Register Data Bus SRAM 512 KB Battery Oscillator for RTC SRAM 512 KB up to 2 MB Application Module Headers 2 2 Address Bus GPIO and Address Decoder IrDA Transceiver RS232 1 Modem Embedded Modem Pe...

Page 15: ...ntation of the eZ80 Development Plat form segmented into its key blocks as shown in the legend for the figure Note Key to blocks A E A Power and serial communications B eZ80F92 Flash Module interface C Debug interface D Application module interfaces E GPIO and LED with Address Decoder Figure 2 The eZ80 Development Platform D E A B C ...

Page 16: ...he eZ80F92 Flash Module segmented into its key blocks as shown in the legend for the figure The structures of the eZ80 Development Platform and the eZ80F92 Flash Module are illustrated in the Schematic Diagrams starting on page 59 Note Key to blocks A C A eZ80F92 Flash Module interfaces B CPU C IrDA transceiver Figure 3 The eZ80F92 Flash Module ...

Page 17: ...memory maps register definitions and interrupt usage Functional Description The eZ80 Development Platform consists of seven major hardware blocks These blocks listed below are diagrammed in Figure 4 eZ80F92 Flash Module interface 2 female headers Power supply for the eZ80 Development Platform the eZ80F92 Flash Module and application modules Application Module interface 2 male headers GPIO and LED ...

Page 18: ...c eZ80 Development Platform Block Diagram RS232 0 Console RS485 LED 7x5 matrix Push buttons I C EEPROM I C Register Data Bus SRAM 512 KB up to 2 MB Application Module Headers 2 2 Address Bus GPIO and Address Decoder RS232 1 Modem Embedded Modem Peripheral Device Signals eZ80 Flash MPU Module Interface ...

Page 19: ...on 9 Physical Dimensions The dimensions of the eZ80 Development Platform PCB is 177 8mm x182 9mm The overall height is 38 1mm See Figure 5 Figure 5 Physical Dimensions of the eZ80 Development Platform 175 3 mm 43 2 mm 96 5 mm 55 9 mm 114 3 mm 157 5 mm 167 6 mm 5 1 mm 165 1 mm 5 1 mm ...

Page 20: ...hout build ing additional hardware eZ80F92 Flash Module Interface The eZ80F92 Flash Module interface provides easy connection of the eZ80F92 Flash Module It also provides easy connection for any eZ80 based module designed to this interface This includes modules using future eZ80 devices and user developed modules using current eZ80 devices The eZ80F92 Flash Module interface consists of two 50 pin ...

Page 21: ...A6 A8 A10 CS2 D3 A17 A5 V3 3_EXT GND_EXT A7 A22 A1 A18 A16 GND_EXT RD D5 GND_EXT A9 A23 CS1 A13 A11 D0 A19 D6 BUSACK V3 3_EXT CS0 INSTRD A15 D1 A14 A3 D4 D7 IOREQ A21 GND_EXT MREQ A12 A20 DIS_FLASH BUSREQ WR D2 DIS_ETH JP1 HEADER 25X2 IDC50 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 ...

Page 22: ...ional Yes 15 A19 Bidirectional Yes Notes 1 For the sake of simplicity in describing the interface Power and Ground nets are omitted from this table The entire interface is represented in the eZ80F92 Module Schematics on pages 62 through 64 2 The Power and Ground nets are connected directly to the eZ80F92 device 3 External capacitive loads on RD WR IORQ MREQ D0 D7 and A0 A23 should be below 10pF to...

Page 23: ... Signal Direction Active Level eZ80F92 Signal2 Notes 1 For the sake of simplicity in describing the interface Power and Ground nets are omitted from this table The entire interface is represented in the eZ80F92 Module Schematics on pages 62 through 64 2 The Power and Ground nets are connected directly to the eZ80F92 device 3 External capacitive loads on RD WR IORQ MREQ D0 D7 and A0 A23 should be b...

Page 24: ...al Direction Active Level eZ80F92 Signal2 Notes 1 For the sake of simplicity in describing the interface Power and Ground nets are omitted from this table The entire interface is represented in the eZ80F92 Module Schematics on pages 62 through 64 2 The Power and Ground nets are connected directly to the eZ80F92 device 3 External capacitive loads on RD WR IORQ MREQ D0 D7 and A0 A23 should be below ...

Page 25: ...bing the interface Power and Ground nets are omitted from this table The entire interface is represented in the eZ80F92 Module Schematics on pages 62 through 64 2 The Power and Ground nets are connected directly to the eZ80F92 device 3 External capacitive loads on RD WR IORQ MREQ D0 D7 and A0 A23 should be below 10pF to satisfy the timing requirements for the eZ80 CPU All unused inputs should be p...

Page 26: ...Figure 7 eZ80 Development Platform I O Connector Pin Configuration JP2 PB1 PB3 PB5 PB7 PC1 PC3 PC5 PC7 GND_EXT PD1 PD3 PD5 PD7 DIS_IRDA CS3 EZ80CLK V3 3_EXT FLASHWE NMI WAIT GND_EXT PB0 PB2 PB4 PB6 GND_EXT PC2 PC4 RTC_VDD PD0 PD2 PD4 PD6 GND_EXT IICSCL IICSDA TDI TDO TRIGOUT TCK TMS RESET GND_EXT HALT_SLP V3 3_EXT PC6 PC0 JP2 HEADER 25X2 IDC50 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 ...

Page 27: ... 7 PB1 Bidirectional Yes 8 PB0 Bidirectional Yes 9 GND 10 PC7 Bidirectional Yes 11 PC6 Bidirectional Yes 12 PC5 Bidirectional Yes 13 PC4 Bidirectional Yes 14 PC3 Bidirectional Yes 15 PC2 Bidirectional Yes 16 PC1 Bidirectional Yes 17 PC0 Bidirectional Yes 18 PD7 Bidirectional Yes Notes 1 For the sake of simplicity in describing the interface Power and Ground nets are omitted from this table The ent...

Page 28: ...ut High 31 TCK ZCL Output Yes 32 TMS Output High Yes 33 RTC_VDD 34 EZ80CLK Input Yes 35 SCL Bidirectional Yes 36 GND Table 3 eZ80 Development Platform I O Connector Identification JP2 Continued Pin Symbol Signal Direction Active Level eZ80F92 Signal2 Notes 1 For the sake of simplicity in describing the interface Power and Ground nets are omitted from this table The entire interface is represented ...

Page 29: ...42 DIS_IrDA Output Low No 43 RESET Bidirectional Low Yes 44 WAIT Output Pull Up 10KΩ Low Yes 45 VDD 46 GND 47 HALT_SLP Input Low Yes 48 NMI Output Low Yes 49 VDD 50 Reserved Table 3 eZ80 Development Platform I O Connector Identification JP2 Continued Pin Symbol Signal Direction Active Level eZ80F92 Signal2 Notes 1 For the sake of simplicity in describing the interface Power and Ground nets are omi...

Page 30: ...ceiver located on the eZ80F92 Flash Module is disabled As a result UART0 can be used with the RS232 or the RS485 interfaces on the eZ80 Devel opment Platform These inputs are only used if external Flash is present on the eZ80F92 Flash Module as shipped from the factory external Flash is not installed Application Module Interface An Application Module Interface is provided to allow the user to add ...

Page 31: ... Tables 4 and 5 list the sig nals and functions related to each of these jumpers by pin Power and ground signals are omitted for the sake of simplicity Table 4 GPIO Connector J6 Signal Pin Function Direction Notes SCL 5 I2 C Clock Bidirectional SDA 7 I2 C Data Bidirectional MOD_DIS 9 Modem Disable Input If a shunt is installed between pins 6 and 9 the modem function on the eZ80 Development Platfor...

Page 32: ..._DIS 12 Console Disable Input If a shunt is installed between pins 12 and 14 the Console function on the eZ80 Development Platform is disabled Reserved 16 18 PD 7 0 22 24 26 28 30 32 34 36 Port D Bit 7 0 Bidirectional PB 7 0 40 42 44 46 48 50 52 54 Port B Bit 7 0 Bidirectional Table 4 GPIO Connector J6 Continued Signal Pin Function Direction Notes Note All of the signals are driven directly by the...

Page 33: ...nector J8 Signal Pin Function Direction A 0 7 3 10 Address Bus Low Byte Output A 8 15 13 20 Address Bus High Byte Output A 16 23 23 30 Address Bus Upper Byte Output RD 33 Read Signal Output RESET 35 Push Button Reset Output BUSACK 37 CPU Bus Acknowledge Signal Output NMI 39 Nonmaskable Interrupt Input D 0 7 43 50 Data Bus Bidirectional CS 0 3 53 56 Chip Selects MREQ 57 Memory Request Output WR 34 ...

Page 34: ...ols the register functions for the LED cathode modem reset and user triggers Address 800002h controls GPIO Port A data Port A Emulation GPIO Port A is emulated with the use of the GPIO Output Control Regis ter and the GPIO Data Register If bit 7 in the GPIO Output Control Reg ister is 1 all of the lines on GPIO Port A are configured as input ports If this bit is 0 all of the lines on Port A are co...

Page 35: ...x device on the eZ80 Development Platform is a memory mapped device that can be used to display information such as programmed alphanumeric characters For example the LED display Anode Col 4 X Anode Col 5 X Anode Col 6 X Anode Col 6 X GPIO Output X Table 8 GPIO Data Register Function Bit 7 6 5 4 3 2 1 0 GPIO D0 X GPIO D1 X GPIO D2 X GPIO D3 X GPIO D4 X GPIO D5 X GPIO D6 X GPIO D7 X Table 7 LED Ano...

Page 36: ...te each of the LED s respectively Bit 7 in Table 7 does not carry any significance within the LED matrix It is used for GPIO as a Port A control bit Table 9 indicates the multiple register functions of the LED cathode modem and triggers This table shows the bit configuration for each cath ode bit Bits 5 6 and 7 do not carry any significance within the LED matrix These three bits are control bits f...

Page 37: ... Low places the optional socket modem into a reset state The user must pull this bit High again to enable the socket modem Reference the appropriate documentation for the socket modem to reset timing requirements User Triggers Two general purpose trigger output pins are provided on the eZ80 Development Platform Labeled J21 Trig2 and J22 Trig1 these pins allow the user a way to trigger external equ...

Page 38: ...onnection capability The modem socket interface provided by these three connectors is shown in Figure 9 Tables 10 through 12 identify the pins for each connector The embedded modem utilizes UART1 which is available via the Port C pins Figure 9 Embedded Modem Socket Interface J1 J5 and J9 Table 10 Connector J5 Pin Symbol Description 1 M TIP Telephone Line Interface TIP 2 M RING Telephone Line Inter...

Page 39: ...ndicator can drive an LED anode without additional circuitry 9 D4 TxD indicator can drive an LED anode without additional circuitry Table 12 Connector J1 Pin Symbol Description 2 MOD_DIS Modem disable active Low 4 VCC 5 VDC or 3 3 VDC input 24 GND Ground 25 PC4_DTR1 DTR interface TTL levels 26 PC6_DCD1 DCD interface TTL levels 27 PC3_CTS1 CTS interface TTL levels 28 PC5_DSR1 DSR interface TTL leve...

Page 40: ...e is available in the SocketModem data sheet from www multitech com eZ80 Development Platform Memory Memory space on the eZ80 Development Platform consists of onboard SRAM and additional SRAM footprints Onboard SRAM The eZ80 Development Platform features 512KB SRAM at U20 This SRAM provides the basic memory requirement for small applications development This SRAM is in the address range B80000h BF...

Page 41: ...64KB block It can also be disabled Please see the eZ80F92 eZ80F92 Product Specification PS0153 for more information Flash Memory The eZ80F92 Development Kit allows off chip Flash memories between 1MB and 4MB This Flash memory is entirely located on the eZ80F92 Flash Module in footprint only as shipped from the factory external Flash is not installed Memory Map A memory map of the eZ80 CPU is illus...

Page 42: ...B LED GPIO Platform SRAM 512 KB Module SRAM 1 MB Up to 4 MB 800000h 7FFFFFh 400000h 3FFFFFh 120000h 11FFFFh 020000h Flash Memory Module Expansion Flash Memory up to 4 MB Expansion Module Flash Memory up to 4 MB Platform Expansion SRAM Memory up to 4 MB FFFFFFh FFE000h DFFFFFh SRAM Memory up to 2 MB Available Address Space 000000h 01FFFFh On chip Flash memory On chip SRAM Off chip Flash memory Off ...

Page 43: ...s received from the modem Data Terminal Ready The Data Terminal Ready DTR signal at D3 informs the modem that the PC is ready TX The TX signal at D4 indicates that data is transmitted to the modem Push Buttons The eZ80 Development Platform provides user controls in the form of push buttons These push buttons serve as input devices to the eZ80F92 microcontroller The programmer can use them as neces...

Page 44: ...opment Platform Jumpers The eZ80 Development Platform provides a number of jumpers that are used to enable or disable functionality on the platform enable or disable optional features or to provide protection from inadvertent use Jumper J2 The J2 jumper connection enables disables IrDA transceiver functional ity When the shunt is placed IrDA communication is disabled See Table 13 Table 13 J2 DIS_I...

Page 45: ... Shunt Status Function Affected Device In Application Module Hardware Disabled Communication with 7x5 LED and Port emulation circuit is disabled Out Application Module Hardware Enabled Communication with 7x5 LED and Port A emulation circuit is enabled Table 15 J7 FlashWE Off Chip Shunt Status Function Affected Device Out The Flash boot sector of the eZ80F92 Flash Module is write protected Flash bo...

Page 46: ...if an embedded modem is used See Table 17 Table 16 J11 DIS_Flash Off Chip Shunt Status Function Affected Device In All access to Flash on the eZ80F92 Flash Module is disabled Flash on eZ80F92 Flash Module Out Flash on the eZ80F92 Flash Module is enabled Flash on eZ80F92 Flash Module Note As shipped from the factory external Flash memory is not installed Table 17 J12 5VDC 3 3VDC for an Embedded Mod...

Page 47: ...be available in future eZ80 devices Table 18 J14 RI Shunt Status Function Affected Device 1 2 The Ring Indicator for UART1 is inverted UART1 2 3 The Ring Indicator for UART1 is not inverted UART1 Table 19 J15 RS485_1_EN Shunt Status Function Affected Device In The RS485 circuit is enabled on UART0 The UART0 CONSOLE interface and IrDA are disabled IrDA UART0 CONSOLE interface RS485 interface Out Th...

Page 48: ...nation resistor circuit is enabled See Table 21 Table 20 J16 RS485_2_EN Shunt Status Function Affected Device In The RS485 circuit is enabled on UART1 The UART1 MODEM interface and the Socket Modem interface are disabled UART1 MODEM interface Socket Modem Interface and RS485 interface Out The RS485 circuit is disabled on UART1 UART1 MODEM interface Socket Modem Interface and RS485 interface Table ...

Page 49: ...LAN telephone lines J6 and J8 are the headers or connectors that provide pin outs to connect any external application module such as ZiLOG s Thermostat Applica tion Module Connector J6 The J6 connector provides pin outs to make use of GPIO functionality Connector J8 The J8 connector provides pin outs to access memory and other control signals Table 22 J18 RT_2 Shunt Status Function Affected Device...

Page 50: ...80 Development Platform are the U2 EEPROM and the U13 Configuration register The EEPROM provides 16KB of memory The Configuration register provides access to control the configuration of an application specific function at the Application Module Interface Neither device is utilized by the eZ80F92 Development Kit software The user is free to develop proprietary software for these two devices The ad...

Page 51: ...e of application that is developed to run with the platform Table 24 DC Current Characteristics of the eZ80 Development Platform with Different Module Loads Platform Modules Configurations Current Requirement mA Status eZ80 Development Platform and eZ80F92 Flash Module 173 When connected only to a power supply and when no program is running eZ80 Development Platform eZ80F92 Flash Module and Modem ...

Page 52: ...ent Platform eZ80F92 Flash Module and Thermostat Application Module 350 When the LED demo is running eZ80 Development Platform eZ80F92 Flash Module Modem Module and Thermostat Application Module 360 When the LED demo is running Table 24 DC Current Characteristics of the eZ80 Development Platform with Different Module Loads Continued Platform Modules Configurations Current Requirement mA Status ...

Page 53: ...ports and I2C devices are supported when connected to the eZ80 Devel opment Platform A block diagram representing both of these boards is shown in Figure 1 on page 4 The eZ80F92 Flash Module is developed to be a plug in module to the eZ80 Development Platform This small footprint module provides a CPU RAM an IrDA transceiver and a real time clock This low cost expandable module is powered by the e...

Page 54: ... The dimensions of the eZ80F92 Flash Module PCB is 64x64mm With an RJ 45 Ethernet connector the overall height is 25mm See Figure 11 Figure 11 Physical Dimensions of the eZ80F92 Flash Module max 8 3 mm 2 54 mm 1 1 Top View Bus Connector I O Connector 8 5 mm 64 mm 63 5 mm 55 88 mm 9 mm 7 mm 6 2 mm 2 7 mm IrDA ...

Page 55: ...Z80F92 Development Kit User Manual UM013904 0203 PRELIMINARY Functional Description 45 Figure 12 illustrates the top layer silkscreen of the eZ80F92 Flash Mod ule Figure 12 eZ80F92 Flash Module Top Layer ...

Page 56: ...F92 Development Kit User Manual Functional Description PRELIMINARY UM013904 0203 46 Figure 13 illustrates the bottom layer silkscreen of the eZ80F92 Flash Module Figure 13 eZ80F92 Flash Module Bottom Layer ...

Page 57: ...ct CS1 can be set to 08h no wait states Flash Memory The eZ80F92 Flash Module features 128KB of Flash memory This on chip memory can be programmed a single byte at a time or in bursts of up to 128 bytes Write operations can be performed using either memory or I O instructions Erasing bytes in Flash memory returns them to a value of FFh Both the MASS ERASE and PAGE ERASE operations are self timed b...

Page 58: ...0 is connected to PD0 TX PD1 RX and PD2 Shutdown IR_SD The IrDA transceiver is of the LED type 870nm Class 1 The IrDA transceiver is accessible via the IrDA controller attached to UART0 on the eZ80F92 device The UART0 console and the IrDA trans ceiver cannot be used simultaneously To use the UART0 for console or to save power the transceiver can be disabled by the software or by an off board signa...

Page 59: ...D2 on the eZ80F92 Flash Module The IrDA control software on the user s wireless device must enable this pin to wake the IrDA transceiver The SD pin must be set Low to enable the IrDA transceiver On the eZ80F92 Flash Module a two input OR gate is used to allow an external pin to shut down the IrDA transceiver Both pins must be set Low to enable this function Figure 14 highlights the eZ80F92 Flash M...

Page 60: ... After the eZ80F92 Flash Module completes transmitting this bit is changed to allow for incoming messages The code that follows provides an example of how this function is enabled on the eZ80F92 Flash Module Init_IRDA Ensure to first set PD2 as a port bit an output and set it Low PD_ALT1 0xFC PD0 uart0tx PD1 uart0_rx PD_ALT2 0x03 Enable alternate function UART_LCTL0 0x80 Select dlab to access baud...

Page 61: ...ip is removed it is also connected to the 3 3V supply to the chip for recharging The RTC can operate down to 3 0V it requires 10µA of current The keep alive time this capacitor can supply power to the RTC from 3 3V to 3 0V is approximately 3000 seconds or 50 minutes Flash Loader Utility The Flash Loader utility allows the user a convenient way to program on chip Flash memory Please refer to the Ex...

Page 62: ...figuration for another perform the following steps 1 Place the tip of the removal tool into the round hole at the top of the current plug configuration 2 Press down to disengage the keeper tab and push the plug configura tion out of its slot 3 Select the plug configuration appropriate for your location and insert it into the slot formerly occupied by the previous plug configuration 4 Push the new ...

Page 63: ...eZ80F92 Development Kit User Manual UM013904 0203 PRELIMINARY Changing the Power Supply Plug 53 Figure 16 Inserting a New Plug Configuration ...

Page 64: ... a physical interface between ZPAKII and the eZ80 Development Platform The TIM module supports ZDI functions For more information on using the TIM module or ZDI please refer to the eZ80Acclaim Development Kits Quick Start Guide QS0019 the eZ80F92 Ethernet Module Product Specification PS0186 and the eZ80F92 Flash Module Product Specification PS0189 JTAG Connector P1 is the JTAG connector on the eZ8...

Page 65: ...2 Development Kit User Manual UM013904 0203 PRELIMINARY Application Modules 55 For additional reading about the Thermostat application please see the Java Thermostat Demo Application Note AN0104 on zilog com ...

Page 66: ...e of the art development environment Based on the Windows Win98SE NT4 0 SP6 Win2000 SP2 WinXP user interfaces ZDS II integrates a language sensitive editor project manager C Compiler assembler linker librarian and source level symbolic debugger that supports the eZ80F92 For further details about ZDS II for eZ80Acclaim products please refer to the ZiLOG Developer Studio eZ80Acclaim User Manual UM01...

Page 67: ... The eZ80F92 Development Kit is shipped with a Flash Loader utility that is loaded in the protected boot sector of Flash memory U3 Upon power up of the eZ80 Development Platform and the eZ80F92 Flash MCU Module the eZ80F92 device on the module starts running code from this Flash memory area This code enables the Console port with settings of 57 6kbps 8 N 1 The Console checks the Receive buffer If ...

Page 68: ...in and Jumper J2 are turned OFF the IrDA device is enabled Install a jumper on connector J6 across pin names con_dis and GND to disable the console serial port driver Contacting ZiLOG Customer Support For additional troubleshooting solutions see ZDS Online Help For valuable information about hardware and software development tools visit ZiLOG Customer Support online Download the latest released ve...

Page 69: ...PD5_DSR0 PD3_CTS0 PC2_RTS1 CS1 PC5_DSR1 IORQ PC7_RI1 PC6_DCD1 PC0_TXD1 CON_DIS WR PD6_DCD0 MEMRQ BUSACK RESET EM_D1 EM_D2 EM_D3 EM_D4 EM_D5 EM_D6 EM_D7 D 7 0 A 23 0 EM_D0 MWAIT MRESET MOD_DIS CS0 CS1 CS2 CS_EX SCL SDA MD 7 0 VDD GND VCC 9VDC PB2_SS PB1_T1_I PB0_T0_I DIS_FL ID_0 ID_1 ID_2 M_TIP M_RING L_RD DIS_ETH DIS_IRDA IORQ MEMRQ PHI WR RD CS3 J1 HEADER 32 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16...

Page 70: ...W1 SW PUSHBUTTON C2 0 1uF U8B TC74LVT125 5 6 14 4 7 U16 74LCX543 SO 24 3 4 5 6 7 8 9 10 22 21 20 19 18 17 16 15 12 14 1 13 2 23 11 VCC A1 A2 A3 A4 A5 A6 A7 A8 B1 B2 B3 B4 B5 B6 B7 B8 GND LEAB LEBA OEAB OEBA CEBA CEAB U8D TC74LVT125 12 11 14 13 7 C4 0 001uF U12 74HCT374 3 4 7 8 13 14 17 18 1 11 2 5 6 9 12 15 16 19 20 10 D0 D1 D2 D3 D4 D5 D6 D7 OE CLK Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 VCC GND J19 EX_SEL 1 3 5...

Page 71: ... U9C TC74LVC08 9 10 8 14 7 C9 0 1uF U18 AS7C34096 1 2 3 4 5 14 15 16 17 18 20 21 22 23 24 32 33 34 35 19 36 6 13 31 9 27 10 28 7 8 11 12 25 26 29 30 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 NC NC CE WE OE VDD0 VDD1 VSS0 VSS1 D0 D1 D2 D3 D4 D5 D6 D7 U20 AS7C34096 1 2 3 4 5 14 15 16 17 18 20 21 22 23 24 32 33 34 35 19 36 6 13 31 9 27 10 28 7 8 11 12 25 26 29 30 A0 A1 A2 A3 A...

Page 72: ...3 DB9 Male 5 9 4 8 3 7 2 6 1 U25 LT1086 3 3 TO220 1 3 2 GND VIN VOUT R23 120 U24 MAX3245CAI 28 24 1 2 14 13 12 22 23 20 19 18 17 16 15 25 8 7 6 5 4 21 11 10 9 3 27 26 C1 C1 C2 C2 T1IN T2IN T3IN FORCEOFF FORCEON R2OUTB R1OUT R2OUT R3OUT R4OUT R5OUT GND R5IN R4IN R3IN R2IN R1IN INVALID T3OUT T2OUT T1OUT V V VCC C20 0 1 R14 10K C26 0 1 J17 RT_1 1 2 J15 RS485_1_EN 1 2 R15 680 C23 22uF R22 120 C15 0 1 ...

Page 73: ...203 PRELIMINARY Schematic Diagrams eZ80F92 Development Kit User Manual 63 Figure 21 eZ80 Development Platform Schematic Diagram 5 of 5 RS 485 Cable LENGTH 5 WIRES 28 AWG P1 MATES WITH AMP 749268 1 1 2 3 4 5 6 7 8 ...

Page 74: ... HALT_SLP NMI PB 0 7 PC 0 7 PD 0 7 JTAG 1 4 CS 0 3 RTC_VDD TDO Power PowerSupply GND V3 3 ROM NOR Flash D 0 7 A 0 23 RD WR CSFLASH RESFLASH FLASHWE Peripherals Reset RESET IRDA_TXD IRDA_RXD IRDA_SD Logic CTRL Logic RD WR ETHRD ETHWR D 0 7 SD 0 7 A 0 23 SA 0 3 ETHIRQ SLEE P ACTIVE DIS_IRDA IRDA_SD IRDA_TXD IRDA_RXD CSFLASH RESFLASH PD 0 7 CS 0 3 RESET DIS_FLASH IOCHRDY WAIT RAM SRAM D 0 7 A 0 23 RD...

Page 75: ...8 100 C19 0 1F GOLDCAP_SD C22 1nF C24 18pF U8 eZ80F92 TQFP100 83 75 87 82 84 86 96 97 100 35 85 74 17 54 66 73 99 49 98 20 81 64 88 89 90 91 92 93 94 95 80 72 79 65 78 29 77 45 76 30 63 71 50 62 53 70 60 36 69 21 68 59 67 31 55 58 7 37 33 61 46 1 51 22 56 57 26 34 27 32 28 52 38 48 2 8 39 47 40 3 23 4 43 41 5 24 42 44 6 9 25 10 18 11 12 13 19 14 15 16 PC7 RI1 PD7 RI0 VDD PC6 DCD1 VSS XOUT VDD VSS ...

Page 76: ... D6 D5 D4 A12 A11 A10 A9 A8 A18 A17 A 0 23 D 0 7 CS1 RD WR D0 D1 D2 D3 D4 D5 D6 D7 V3 3 GND U1 512kx8 SRAM SOJ36 400 31 35 6 34 5 33 7 32 4 3 24 2 25 23 26 36 29 30 1 22 28 13 27 21 8 11 12 18 17 10 19 20 16 15 14 9 OE A18 CE A17 A4 A16 I O0 A15 A3 A2 A14 A1 I O4 A13 I O5 N C I O6 I O7 A0 A12 VSS WE VDD A11 I O1 I O2 I O3 A9 A8 VSS N C A10 A7 A6 A5 VDD RN1 C7 100nF U2E 74LVC04 SO 11 10 U2F 74LVC04...

Page 77: ...0 A3 VDD A6 A 0 23 A7 A2 A11 A10 A18 A1 A17 A9 A8 A16 A5 A15 A20 RESFLASH A12 FLASHWE A21 D4 DFLASH4 D3 DFLASH3 D2 DFLASH2 D1 DFLASH1 D6 DFLASH6 D5 DFLASH5 D7 DFLASH7 D0 DFLASH0 D 0 7 WP VDD FLASHWE V3 3 GND U2A 74LVC04 SO 1 2 U3 MT28F008B3VG TSOP40 20MM 25 21 26 20 27 19 28 18 32 17 33 16 34 15 35 14 8 7 36 6 5 4 3 2 1 40 13 37 38 22 24 9 10 12 11 29 23 39 30 31 DQ0 A0 DQ1 A1 DQ2 A2 DQ3 A3 DQ4 A4...

Page 78: ...30 31 32 33 34 35 36 55 56 57 61 62 63 64 69 70 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 SD4 SD5 SD6 SD7 SD0 SD1 SD2 SD3 SA17 SA18 SA19 SA13 SA14 SA15 SA16 SA0 AVSS SA1 ELCS SA2 EECS SA3 EESK SA4 EEDATAOUT TDO SA5 EEDATAIN SA6 CHIPSEL SA7 DVSS SA8 DVDD SA9 DVSS SA10 DMARQ2 SA11 DMACK2 REFRESH DMARQ1 SA12 DMACK1 DMARQ0 DMACK0 CSOUT SD15 SD14 SD13 SD12 DVDD DVSS...

Page 79: ...transceiver MMA 020 4 open drain alternative Maxim MAX6802UR29D3 VSS VDD IRDA_TXD IRDA_SD IRDA_RXD IRDA_TXD IRDA_RXD IRDA_SD RESET V3 3 GND V3 3 V3 3 C9 100nF 0603 R6 2R7 0 25W 1206 R5 68R C11 330nF U5 ZHX1810 2 4 3 1 5 6 0 TXD SD RXD LEDA VCC GND T C10 10nF 0603 U4 MAX6328UR29 SOT 23 L3 2 1 3 RESET GND VDD R3 2k2 0603 RESET IRDA_RXD IRDA_TXD IRDA_SD ...

Page 80: ...EQ TDO CS_RAM D3 A17 A5 V3 3_EXT GND_EXT A7 A22 A1 A18 A16 GND_EXT RD D5 GND_EXT A9 A23 CS1 A13 A11 FUTURE_USE GND_EXT D0 A19 D6 BUSACK V3 3_EXT CS0 INSTRD A15 D1 A14 A3 D4 D7 IOREQ A21 GND_EXT MREQ A12 A20 DIS_FLASH BUSREQ WR D2 GND_EXT HALT_SLP V3 3_EXT PC6 PC0 WAIT WAIT V3 3 GND R9 33 R8 4k7 R7 4k7 R12 10k R11 10k R13 4k7 R10 2k2 0603 JP1 HEADER 25X2 IDC50 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16...

Page 81: ...y on board common power plane common ground plane for test purposes don t stuff Input VDD V3 3 3 3V 5 Power Pmax 1 6W Ptyp 0 4W Current Imax 200mA IrDA not in use Imax 460mA IrDA in use Ityp 100mA GND GND V3 3 V3 3 V3 3 GND C1 47uF TAJC C2 47uF TAJC JP3 HEADER 2 SIP2 1 2 C3 1nF C4 100nF C5 1nF C6 100nF PCB1 E NET Module Rev B 98Cxxxx xxx V3 3 GND ...

Page 82: ...FLASH RESET IRDA_TXD PD0 IRDA_RXD PD1 IRDA_SD RESET RD WR ETHRD ETHWR CS3 CSETH CS0 CSFLASH IRDA_SD PD7 PD6 ETHIRQ PD4 DIS_IRDA DIS_FLASH IR_SD PD2 DISABLE_FLASH DISABLE_IRDA DIS_FLASH DIS_IRDA WAIT WAIT V3 3 GND R17 10k 0603 U2B 74LCX04 TSSOP14 3 4 R35 0 U2C 74LCX04 TSSOP14 5 6 R30 10k 0603 R14 0R U2D 74LCX32 TSSOP14 12 13 11 U6A 74LCX32 TSSOP14 1 2 3 R15 0R U6B 74LCX32 TSSOP14 4 5 6 U6D 74LCX32 ...

Page 83: ... Logic GAL devices U10 Address Decoder define idle 2 b00 define state1 2 b01 define state2 2 b11 define state3 2 b10 FOR eZ80 Development Platform Rev B This PAL generates 4 memory chip selects module f92_decod nCS_EX Enables Extension Module s Memory when Low nFL_DIS when Low WEB Module Flash is disabled nDIS_FL 0 when High nDIS_FL depends upon state of nmemenX nCS0 A7 A23 A6 A22 A5 A21 A4 A20 A3...

Page 84: ... Low nL_RD enables local data bus to be read by CPU nmemen1 nmemen2 nmemen3 nmemen4 input nFL_DIS synthesis loc P4 nCS0 synthesis loc P5 nCS2 synthesis loc P3 was 23 A7 synthesis loc P6 A6 synthesis loc P7 A5 synthesis loc P9 A4 synthesis loc P10 A3 synthesis loc P11 A2 synthesis loc P12 A1 synthesis loc P13 A0 synthesis loc P16 nEX_FL_DIS synthesis loc P2 input 7 0 A upper part of Address Bus of ...

Page 85: ... P19 nmemen3 synthesis loc P20 nmemen4 synthesis loc P21 nEM_EN synthesis loc P24 enables LED and Port A emulation nDIS_FL synthesis loc P25 nL_RD synthesis loc P23 wire nCS_EX nmemen1 nmemen2 nmemen3 nmemen4 wire MOD_DIS nmemen1 0 nmemen2 0 nmemen3 0 nmemen4 0 if any of the signals is Low Flash on the Module will be disabled if nDIS_FL is High wire nEXP_EN nCS0 0 A7 0 A6 1 expansion module Flash ...

Page 86: ...A3 5 h17 assign nmemen3 nCS2 0 A7 A6 A5 A4 A3 5 h16 assign nmemen2 nCS2 0 A7 A6 A5 A4 A3 5 h15 assign nmemen1 nCS2 0 A7 A6 A5 A4 A3 5 h14 assign nEM_EN nCS2 0 A7 A6 A5 A4 A3 A2 A1 A0 8 h80 endmodule U15 Address Decoder define anode 8 h00 define cathode 8 h01 define latch 8 h02 FOR eZ80 Development Platform Rev B This PAL generates signals that control Expansion Module access LED and Port A emulati...

Page 87: ...A6 A7 nRD nCS nWR nMEMRQ nIORQ nEM_RD nEM_WR nAN_WR nCT_WR nDIS_ETH input nDIS_EM synthesis loc P3 nEM_EN synthesis loc P4 A0 synthesis loc P5 A1 synthesis loc P6 A2 synthesis loc P10 A3 synthesis loc P11 A4 synthesis loc P12 A5 synthesis loc P13 A6 synthesis loc P27 A7 synthesis loc P26 nIORQ synthesis loc P2 ...

Page 88: ...hesis loc P18 nCT_WR synthesis loc P19 nAN_WR synthesis loc P20 nDIS_ETH synthesis loc P21 parameter anode 8 h00 parameter cathode 8 h01 parameter latch 8 h02 wire 7 0 address A7 A6 A5 A4 A3 A2 A1 A0 assign nEM_WR nDIS_EM 1 nWR 0 nEM_EN 0 address latch assign nEM_RD nDIS_EM 1 nRD 0 nEM_EN 0 address latch assign nAN_WR nDIS_EM 1 nWR 0 nEM_EN 0 address anode assign nCT_WR nDIS_EM 1 nWR 0 nEM_EN 0 ad...

Page 89: ...iLOG System Test Customer Support 532 Race Street San Jose CA 95126 Phone 408 558 8500 Fax 408 558 8536 Email zservice zilog com Problem Description or Suggestion Provide a complete description of the problem or your suggestion If you are reporting a specific problem include all steps leading up to the occurrence of the problem Attach additional pages as necessary eZ80F92 Development Kit Serial or...

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