IN1
IN2
IN3
IN4
IN5
OUT1
DV_SCL/SDA
ADCVBS
ADPb
ADPr
ADY
48bit
8bit
16bit
HDMI_SCL/SDA
HDMI_SCL/SDA
HDMI_SCL/SDA
DV_SCL/SDA
8bit
48bit
FPGA_N_CS
FLASH_N_CS
DFF1_N_CS
36bit
FPGA SPI
Audio Upconv I2S
16bit
DSP SPI
HDMI_SPDIF
HDMI I2S SD0
Audio Upconv I2S SD4
HDMI DSD
HDMI_SPDIF
HDMI_ARC
DIR I2S
DSP SPI
CEC
HDMI_ARC
AV1_D
AV2_D
AV3_D
AV4_D
AD_L / R
HDMI I2S SD1–SD3
HDMI DSD/SPDIF
HDMI_SCL/SDA
HDMI I2S SD0–SD3
KY_AD2
KY_AD1
HDMI I2S SD0
NCPU SPI
Net/USB I2S
DSP I2S SD0–SD3
NETWORK
16bit
16bit
16bit
16bit
16bit
HDMI Audio
HDMI Audio
Net/USB I2S
USB_L / R
16bit
Net/USB I2S
NCPU SPI
I2C_SCL/SDA
RMII 50MHz
TX/RX
USB_DP/DM
24MHz
20MHz
24.576MHz
8MHz CERALOCK
28.63636MHz
27MHz
28.63636MHz
DV_SCL/SDA
16bit
FL / FR
SRL / SRR
SBL / SBR
C / SW
A Video
Buffer
XL1
XL21
XL51
XL75
XL951
XL921
XL922
DC OUT
(USB Rear)
Video Input
SPDIF Input
Analog Input
MAIN Zone
Zone2
Analog Audio
166
167
170
171
5,6
24
22
35
47
48
49
54
22
21
116
115
J3
K3
37
35
32
3
47,48
40
39
145
143
USB
(Front)
HDMI IN
HDMI (Front)
AM/FM Tuner
FL display
DIGITAL (1)
• See page 127–134
→
SCHEMATIC DIAGRAM
DIGITAL (2)
• See page 128
→
SCHEMATIC DIAGRAM
A
B
C
D
E
F
G
H
I
J
1
2
3
4
5
6
7
RX-V675/HTR-6066/RX-A730/TSR-6750
99
DIGITAL P.C.B. Section Block Diagram
Summary of Contents for HTR-6066
Page 126: ...MEMO MEMO RX V675 HTR 6066 RX A730 TSR 6750 126 ...
Page 167: ...167 RX V675 HTR 6066 RX A730 TSR 6750 RX V675 HTR 6066 RX A730 TSR 6750 ADVANCED SETUP ...
Page 168: ...168 RX V675 HTR 6066 RX A730 TSR 6750 RX V675 HTR 6066 RX A730 TSR 6750 ...
Page 181: ...181 RX V675 HTR 6066 RX A730 TSR 6750 RX V675 HTR 6066 RX A730 TSR 6750 MEMO ...
Page 182: ...RX V675 HTR 6066 RX A730 TSR 6750 ...