Pin
No.
Port Name
Function Name
(P.C.B.)
I/O
Detail of Function
POWER
ON
OFF
1
SRXD4/SDA4/TXD4/ANEX1/P9_6 TU_SDA
I/O
O
T
u
ner I2C data
2
CLK4/ANEX0/P9_5
VOL_CLK
O
O
Vol
u
me/Selector comm
u
nication clock
3
N_CTS4/N_N_RTS4/N_SS4/
TB4IN/DA1/P9_4
VOL_MOSI
O
O
Vol
u
me/Selector comm
u
nication data
4
N_CTS3/N_N_RTS3/N_SS3/
TB3IN/DA0/P9_3
AMP_LMT
O
I
Limiter control
5
IEOUT/ISTXD2/OUTC2_0/SRXD3/
SDA3/TXD3/TB2IN/P9_2
HDMI_SDA
I/O
O
HDMI and VDec 400k I2C data
6
IEIN/ISRXD2/STXD3/SCL3/RXD3/
TB1IN/P9_1
HDMI_SCL
O
O
HDMI and VDec 400k I2C clock
7
CLK3/TB0IN/P9_0
FL_N_RST
O
O
FLD reset
8
P19_7
+3.3S_PON
O
O
+3.3S power s
u
pply control
9
N_INT8/P14_6
HRX_N_INT
I
O
HDMI RX interr
u
pt
10 P19_6
HDMI_PON
O
O
HDMI power s
u
pply control (necessary for movement
of DSP, VDec)
11 N_INT7/P14_5
HDMI_MUTE
I
O
HDMI m
u
te
12 N_INT6/P14_4
ACPWR_DET
I
I
AC power detection
13 P14_3
VOL_RB
I
I
Vol
u
me B
14 VDC0
VDC0
---
15
P14_1
(for excl
u
sive
u
se of the inp
u
t)
VOL_RA
I
I
Vol
u
me A
16 VDC1
VDC1
---
17 NSD
NSD
Deb
u
gger
18 CNVSS
CNVSS
---
19 XCIN/P8_7
DK1_PON
O
O
Dock1 power s
u
pply control
20 XCOUT/P8_6
DSP_PON
O
O
DSP power s
u
pply control
21 RESET
MCPU_N_RST
---
22 XOUT
XOUT
---
23 VSS
VSS
---
24 XIN
XIN
---
25 VCC
VCC
---
26 NMI/P8_5
NMI
---
27 N_INT2/P8_4
WAKEUP_INT
I
O
Power switch, Dock RX detection (sleep ret
u
rn)
28 N_INT1/P8_3
DIR_N_INT
I
O
DIR interr
u
pt
29 N_INT0/P8_2
REM_IN
I
O
Remote control p
u
lse inp
u
t
30
UD0B/UD1B/IIO1_5/N_RTS5/N_
CTS5/N_SS5/U/TA4IN/P8_1
RWT_CDDA
O
O
CDDA rewriting ro
u
te select
31
UD0A/UD1A/RXD5/SCL5/STXD5/
U/TA4OUT/P8_0
HEQ_SCL
O
O
HDMI switch 100k I2C clock
32 P18_1
USB_N_PRT
O
O
No
u
sed
33 P18_0
I_PRT
I
O
C
u
rrent protection
34
UD0B/UD1B/IIO1_4/CLK5/TA3IN/
P7_7
TU_N_INT
I
O
T
u
ner interr
u
pt
35
UD0A/UD1A/IIO1_3/N_RTS8/
N_CTS8/TXD5/SDA5/SRXD5/
TA3OUT/P7_6
HEQ_SDA
I/O
O
HDMI switch 100k I2C data
36 IIO1_2/RXD8/W/TA2IN/P7_5
DSP_N_INT
I
O
DSP interr
u
pt
37 IIO1_1/CLK8/W/TA2OUT/P7_4
FL_N_CS
O
O
FLD chip select
38 P17_7
VID_N_MMT
O
O
Monitor o
u
tp
u
t m
u
te
39 P17_6
FROM_N_RST
O
O
Flash reset
40 P17_5
USB_SEARCH
I
O
State of USB search
41 P17_4
USB_IRPTO
I
O
USB interr
u
pt (general-p
u
rpose port)
42
IIO1_0/TXD8/N_SS2/N_RTS2/N_
CTS2/V/TA1IN/P7_3
DK1_N_IPDET
I
O
Dock1 iPod detection
43 CLK2/V/TA1OUT/P7_2
FPGA_SCL
O
O
FPGA clock (at Boot)
65
RX-V471/HTR-4064
RX-V471/HTR-4064
Summary of Contents for HTR-4064
Page 5: ...RX V471 K model RX V471 A model RX V471 B G F models 5 RX V471 HTR 4064 RX V471 HTR 4064 ...
Page 6: ...RX V471 L model RX V471 J model HTR 4064 U model 6 RX V471 HTR 4064 RX V471 HTR 4064 ...
Page 7: ...HTR 4064 G F models HTR 4064 T model HTR 4064 K models 7 RX V471 HTR 4064 RX V471 HTR 4064 ...
Page 124: ... CONFIGURING THE SYSTEM SETTINGS RX V471 HTR 4064 125 ...
Page 125: ... システム設定を変更する RX V471 HTR 4064 126 ...
Page 126: ...127 RX V471 HTR 4064 RX V471 HTR 4064 MEMO ...
Page 127: ...RX V471 HTR 4064 ...
