Yamaha DSP-AX763, Service Manual

Page: 64 / 155

RX-V663/HTR-6160/DSP-AX763
64
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IC DATA
IC41: LC89057W-VF4AD-E (DIGITAL P.C.B.)
Digital audio interface transceiver
Input
Selector
RXOUT
RX0
RX1
RX2
RX3
RX4
RX5/VI
RX6/UI
LPF
TMCK/PIO0
TBCK/PIO1
TLRCK/PIO2
TDATA/PIO3
TXO/PIOEN
Cbit, Ubit
Microcontroller
I/F
Data
Selector
Clock
Selector
Modulation
&
Parallel Port
PLL
XIN XOUT XMCK CKST
SLRCK
SBCK
RLRCK
RBCK
RMCK
SDIN
RDATA
RERR
DO
XMODE CI CE CL INT AUDIO/VO EMPHA/UO
1/N
Demodulation
&
Lock detect
1
2
3
4
5
8
9
10
13
44
45
46
47
48
29 28 27 34
23
22
20
17
16
24
21
36
37
41 38 39 40 35 33 32
1) Withstand voltage input/output: I or O = -0.3 to 3.6 V, Is = -0.3 to 5.5 V
2) Pins 32 and 33 are input pins for chip address setting, when pin 41 = "L".
3) Pin 34 is a demodulation function master or an input pin for slave setting, when pin 41 = "L".
4) Pin 35 is a modulation function or an input pin for general-purpose I/O function switch setting, when pin 41 = "L".
5) ON/OFF for all power supplies must be done at the same timing as a latch-up countermeasure.
Pin No. Function Name
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
RXOUT
RX0
RX1
RX2
RX3
DGND
DVDD
RX4
RX5
RX6
DVDD
DGND
LPF
AVDD
AGND
RMCK
RBCK
DGND
DVDD
RLRCK
RDATA
SBCK
SLRCK
SDIN
DGND
DVDD
XMCK
XOUT
XIN
DVDD
DGND
EMPHA/UO/CD
AUDIO/VO
CKST/PT
INT
RERR
DO
DI
CE
CL
XMODE
DGND
DVDD
PIO0
PIO1
PIO2
PIO3
PIOEN
I/O
O
Is
I
Is
Is
Is
Is
Is
O
O
O/I
O/I
O
O
O
Is
O
O
I
I/O
I/O
I/O
I/O
O
O
Is
Is
Is
Is
I/O
I/O
I/O
I/O
I/O
Detail of Function
Output pin of input bi-phase selection data
Input pin of TTL-compatible digital data
Digital data input pin with built-in amplifier that supports coaxial
Input pin of TTL-compatible digital data
Input pin of TTL-compatible digital data
Digital GND
Digital power supply (3.3 V)
Input pin of TTL-compatible digital data
TTL-compatible digital data / Validity flag input pin for modulation
TTL-compatible digital data / User data input pin for modulation
Digital power supply for PLL
Digital GND for PLL
PLL loop filter connection pin
Analog power supply for PLL (3.3 V)
Analog GND for PLL
R system clock output pin (256 fs, 512 fs, XIN, VCO)
R bit clock input/output pin (64 fs)
Digital GND
Digital power supply (3.3 V)
R LR clock input/output pin (fs)
Output pin of serial audio data
S bit clock output pin (32 fs, 64 fs, 128 fs)
(No connected.)
S LR clock output pin (fs/2, fs, 2 fs) (No connected.)
Input pin of serial audio data
Digital GND
Digital power supply (3.3 V)
Oscillation amplifier output pin
Quartz resonator connection output pin
Quartz resonator connection, input pin of external supply clock (24.576 MHz or 12.288 MHz)
Digital power supply (3.3 V)
Digital GND
Emphasis information / U data output / C data output / Chip address setting pin
Non-PCM detection / V flag output / Chip address setting pin
Output of clock switch transitional period signal / Preamble B output / Demodulation master or slave
function switch pin
Interrupt output for microprocessor (Possible to select an interrupt factor.) / Modulation or general-
purpose I/O switch pin
PLL clock error, data error flag output
Microprocessor I/F, read data output pin (3-state)
Microprocessor I/F, write data input pin
Microprocessor I/F, chip enable input pin
Microprocessor I/F, clock input pin"
System reset input pin
Digital GND
Digital power supply (3.3 V)
512 fs, 256 fs, 128 fs system clock input for modulation or external / General-purpose I/O input/output
pin
64 fs bit clock input for modulation / General-purpose I/O input/output pin
fs clock input for modulation / General-purpose I/O input/output pin
Serial audio data input for modulation / General-purpose I/O input/output pin
Modulation data output / General-purpose I/O enable output pin