66
RX-V663/HTR-6160/DSP-AX763
RX-V663/HTR-6160/
DSP-AX763
External memory interface (EMIF) address and control
External memory interface (EMIF) data bus
McASP0, McASP1, McASP2 and SPI1 serial ports
Pin
No.
Function Name
TYPE
(1)
PULL
(2)
GPIO
(3)
Detail of Function
37
38
39
67
70
71
74
75
76
79
80
83
84
86
88
89
91
93
94
96
97
98
100
102
104
41
43
45
46
48
49
51
52
55
56
58
59
61
63
64
66
2
3
4
5
7
9
11
12
113
115
116
EM_CAS
EM_WE
EM_WE_DQM[0]
EM_WE_DQM[1]
EM_CLK
EM_CKE
EM_A[11]
EM_A[9]
EM_A[8]
EM_A[7]
EM_A[6]
EM_A[5]
EM_A[4]
EM_A[3]
EM_A[2]
EM_A[1]
EM_A[0]
EM_A[10]
EM_BA[1]
EM_BA[0]
EM_CS[0]
EM_RAS
EM_CS[2]
EM_RW
EM_OE
EM_D[7]
EM_D[6]
EM_D[5]
EM_D[4]
EM_D[3]
EM_D[2]
EM_D[1]
EM_D[0]
EM_D[15]
EM_D[14]
EM_D[13]
EM_D[12]
EM_D[11]
EM_D[10]
EM_D[9]
EM_D[8]
AHCLKX0
AMUTE0
AMUTE1
AHCLKX1
ACLKX1
ACLKR1
AFSX1
AFSR1
AXRO[0]
AXR0[1]
AXR0[2]
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
SDRAM column address strobe
SDRAM write enable
Write enable or byte enable for EM_D[7:0]
Write enable or byte enable for EM_D[15:8]
SDRAM clock
SDRAM clock enable
EMIF address bus
SDRAM bank address and asynchronous memory low-order address
SDRAM chip select
SDRAM row address strobe
Asynchronous memory chip select
Asynchronous memory read/not write
(No connected.)
SDRAM output enable
EMIF data bus [Lower 16-bit]
McASP0 and McASP2 transmit master clock
McASP0 mute output
McASP1 mute output
McASP1 transmit master clock
McASP1 transmit bit clock
McASP1 receive bit clock
McASP1 transmit frame sync (L/R clock)
McASP1 receive frame sync (L/R clock)
McASP0 serial data 0
McASP0 serial data 1
McASP0 serial data 2
I/O
Summary of Contents for DSP-AX763
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