Xycom XVME-400, Manual

Page: 47 / 83

XVME-400/40l/490/491 Manual
October, 1989
Signal
Mnemonic
A0I-A23
A24-A3 1
BBSY*
BCLR*
BERR*
BG0IN*-
BG3IN*
BG0OUT*-
BG3OUT*
Table A-l. VMEbus Signal Identification (cont’d)
Connector
and
Pin Number
1 A:24-30
lC:15-30
2B:4-11
1B:l
IB:2
1C:ll
1 B:4,6,
8,l0
lB:5,7,
9,ll
Signal Name and Description
ADDRESS BUS (bits l-23): Three-state driven address lines
that specify a memory address.
ADDRESS BUS (bits 24-31): Three-state driven bus
expansion address lines.
BUS BUSY: Open-collector driven signal generated by the
current DTB master to indicate that it is using the bus.
BUS CLEAR: Totem-pole driven signal generated by the
bus arbitrator to request release by the DTB master
if
a
higher level is requesting the bus.
BUS ERROR: Open-collector driven signal generated by a
slave. It indicates that an unrecoverable error has occurred
and the bus cycle must be aborted.
BUS GRANT (0-3) IN: Totem-pole driven signals generated
by the Arbiter or Requesters. Bus Grant In and Out signals
form a daisy-chained bus grant. The Bus Grant In signal
indicates to this board that it may become the next bus
master.
BUS GRANT (0-3) OUT: Totem-pole driven signals
generated by Requesters.
These signals indicate that a
DTB master in the daisy-chain requires access to the bus.
A-2