Xycom XVME-400, Manual

Page: 46 / 83

XVME-400/40l/490/491 Manual
October, 1989
Appendix A
VMEbus CONNECTOR/PIN DESCRIPTIONS
Pl
BACKPLANE CONNECTOR
All the modules have the rear-edge connector PI, which is a 96-pin bus connector
consisting of three rows of 32 pins each. (Row A is physically closest to the board. See
Table A-2). The signals carried by connector Pl are the standard address, data, and
control signals required for a Pl backplane interface as defined by the VMEbus
specification.
Signal
Mnemonic
ACFAIL*
IACKIN*
IACKOUT*
AM0-AM5
AS *
Table A-l identifies and defines the signals carried by the Pl connector.
Table A-l. PI - VMEbus Signal Identification
C o n n e c t o r
and
Pin Number
lB:3
lA:21
1 A:22
A:23
B:16,17,
8,19
C:14
Signal Name and Description
AC FAILURE: Open-collector driven signal which
indicates that the AC input to the power supply is no
longer being provided, or that the required input voltage
levels are not being met.
INTERRUPT ACKNOWLEDGE IN:
Totem-pole driven
signal.
IACKIN*
and IACKOUT* signals form a daisy-
chained acknowledge. The IACKIN* signal indicates to
the VME board that an acknowledge cycle is in progress.
INTERRUPT ACKNOWLEDGE OUT: Totem-pole driven
signal. IACKIN* and IACKOUT* signals form a daisy-
chained acknowledge. The IACKOUT* signal indicates to
the next board that an acknowledge cycle is in progress.
ADDRESS MODIFIER (bits 0-5): Three-state driven lines
that provide additional information about the address bus,
such as: size, cycle type, and/or DTB master identification.
ADDRESS STROBE: Three-state driven signal that
indicates a valid address is on the address bus.
A-l