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XPMC-6710 PrPMC Hardware Reference Manual

14

Freescale MPC7448 PPC Processor

The XPMC-6710 brings the Freescale MPC7448 processor to PrPMC, the most significant 
MPC74xx line of processors to date. The MPC7448 is a high-performance processor 
manufactured on 90 nanometer silicon-on-insulator (SOI) process technology with extensive 
processing performance at very low power. The MPC7448 implements the full PowerPC 
32-bit architecture and is designed to perform between 600 MHz and in excess of 1.5 GHz, 
with a full 1 Mbyte of L2 cache and ECC, while offering enhanced power management 
capabilities. The XPMC-6710 with the MPC7448 processor is ideal for leading-edge pervasive 
computing, embedded network control and signal processing applications.

AltiVec Engine Acceleration

The MPC7448 includes the same powerful 128-bit AltiVec vector execution unit as found in 
previous MPC74xx devices, but with the enhanced support for out-of-order instructions. 
AltiVec technology may dramatically enhance the performance of applications such as voice 
over IP, speech recognition, multi-channel modems, virtual private network servers, 
high-resolution 3D graphics, motion video (MPEG2, MPEG4), high fidelity audio (3D audio, 
AC-3), and so on.

AltiVec computational instructions are executed in the four independent, pipelined AltiVec 
execution units. A maximum of two AltiVec instructions can be issued in order to any 
combination of AltiVec execution units per clock cycle. In the MPC7448, a maximum of two 
AltiVec instructions can be issued out-of-order to any combination of AltiVec execution units 
per clock cycle from the bottom two AltiVec instruction queue entries. For example, an 
instruction in queue 1 destined for AltiVec integer unit 1 does not have to wait for an 
instruction in queue 0 that is stalled behind an instruction waiting for operand availability.

Power Management

Continuing to pursue lower and lower power consumption is a keen focus with the Freescale 
family of Power Architecture processors, and the MPC7448 is no exception. Power 
management features include:

• Expanded Dynamic Frequency Switching (DFS) enabling software to change power 

consumption 

• Nap and Sleep modes 
• Voltage scaling down to at least 1.0V
• Added benefits of 90-nm technology
• Multi-Vt and Triple Gate Oxide integrated transistors for low standby power 
• Low-K Dielectric for high performance with reduced power and noise 
• Temperature sensing diodes included to monitor die temperature 

Summary of Contents for Xembedded XPMC-6710

Page 1: ...XPMC 6710 Processor PMC Module REFERENCE MANUAL Document Number 646710 September 26 2006 retired...

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Page 3: ...aded for personal use or referenced in another document as a URL to the Xembedded Incorporated Web site The text itself may not be published commercially in print or electronic form edited translated...

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Page 5: ...5461S Gigabit Transceiver 16 Features 16 GPIO Configuration 17 Temperature Sensing 18 Specifications 19 Safety 19 EMC 19 About This Manual 20 Feedback 20 References 20 Safety Summary 21 Ground the Sys...

Page 6: ...Sources of Reset 24 Front Panel I O 25 Rear I O 26 Installation 27 Installation Procedure 27 User Configurable Switches 29 PMC Connectors 30 PMC Site Connector J1 30 PMC Site Connector J2 31 PMC Site...

Page 7: ...d Back Views 12 XPMC 6710 Front Panel 25 Typical PMC Installation 28 Location of User Configurable Switches 29 J1 Connector 30 J2 Connector 31 J3 Connector 32 J4 Connector 33 Serial Port Mini USB Conn...

Page 8: ...XPMC 6710 Reference Manual 8 Document Number 646710 This page is intentionally left blank...

Page 9: ...XPMC 6710 Product Specification 19 XPMC 6710 Rear I O 26 PMC Connector J1 Pinout 30 PMC Connector J2 Pinout 31 PMC Connector J3 Pinout 32 PMC Connector J4 Pinout 33 Serial Port Connector J2 Mini USB P...

Page 10: ...XPMC 6710 Reference Manual 10 Document Number 646710 This page is intentionally left blank...

Page 11: ...s Figure 1 is an Illustration of the XPMC 6710 functional block diagram The XPMC 6710 utilizes the XPIM 710 PMC I O Module to convert the rear I O signals to standard connectors J1 A and J1 B of the X...

Page 12: ...w Heatsink Tsi109 Host Bridge LAN0 and LAN1 LEDs Battery LAN0 RJ 45 Conn GPIO User Defined LEDs Serial Port Mini USB Conn Memory CMC Conns P1 thru P4 Front View Switch SW2 Up to 1 Gbyte DDR II 400MHz...

Page 13: ...power up and may be an interrupt handler A Non monarch is therefore not the main CPU does not perform PCI bus enumeration after power up and may be an interrupt generator The MONARCH signal defines a...

Page 14: ...resolution 3D graphics motion video MPEG2 MPEG4 high fidelity audio 3D audio AC 3 and so on AltiVec computational instructions are executed in the four independent pipelined AltiVec execution units A...

Page 15: ...ost bridging It delivers industry leading performance for customers in the wireless infrastructure storage networking network access printer military and industrial automation markets Features 2 5W ty...

Page 16: ...r Echo NEXT and FEXT Low power is a key factor in implementing Gigabit small form factor NICs and uplinks less than 700 mW per port the BCM5461S has the industry s lowest power requirement For NIC app...

Page 17: ...ted transition low to high or a high to low or a level detected state Table 1 below list the location and destination of the GPIOs Table 1 GPIOs Signals and Destinations Signal Destination GPIO0 J4 Pi...

Page 18: ...unning mode The analog input multiplexer alternately selects either the on chip temperature sensor to measure its local temperature or the remote temperature sensor The ADC digitizes these signals and...

Page 19: ...sign to meet or exceed UL 60950 3rd Ed CSA C22 2 No 60950 00 EN60950 IEC 60950 a EMC Design to meet or exceed FCC 47 CFR Part 15 Class B CE Mark to EN55022 EN55024 Warranty 2 year limited Table 2 XPMC...

Page 20: ...mes feedback about how we can make our manuals and technical documentation more useful to our customers Please feel free to send comments and suggestions to support Xembedded com References American N...

Page 21: ...ironment constitutes a definite safety hazard Keep Away from Live Circuits Operating personnel must not remove product covers Component replacement and internal adjustments must be made by qualified m...

Page 22: ...em WARNING This sign denotes a hazard It calls attention to a procedure practice or condition which if not correctly performed or adhered to could result in injury or death to personnel CAUTION This s...

Page 23: ...oadcom BCM5461S Gigabit Transceivers The first Gigabit Port is routed to the front as well as to the back J4 connector The Front or the Rear option is set by Software The Second port is only routed to...

Page 24: ...XPMC 6710 Power on reset PCI reset from the Carrier module COP Header if JTAG is used Tsi109 GPIO11 SW1 on the back of the board during debugging The XPMC 6710 also outputs the RESETOUT on Pin 60 of...

Page 25: ...the GPIOs Figure 1 1 is a drawing depicting the front Bezel The four user defined LEDs are OFF by default Figure 1 1 XPMC 6710 Front Panel PMC710 LAN0 A1 L1 A0 L0 SERIAL USER DEFINED 0 1 2 3 A1 L1 A0...

Page 26: ...rear I O available consisting of the following see Table 1 1 below Table 1 1 XPMC 6710 Rear I O Signal Connector JTAG Header for CPLD J4 Dual 10 100 1000 Mbit Ethernet J4 Dual RS 232 Serial interface...

Page 27: ...ee Figure 1 3 on page 29 for the switch configurations 2 Install the standoffs on the board as shown in Figure 1 2 on page 28 3 Remove the blank covering the PMC site from the carrier if applicable In...

Page 28: ...ment Number 646710 1 XPMC 6710 Reference Manual Figure 1 2 Typical PMC Installation Back of Carrier Board Solder Side PMC Mounting on the Carrier Board Front View PMC Mounting on the Carrier Board Rea...

Page 29: ...RST 3 and 4 PWRUP_PB_SWRST 0 1 Enable Processor after master reset is released 1 0 Hold Processor interface in reset after master reset is released 0 0 Invalid 1 1 Invalid 5 and 6 PWRUP_PCI1_SWRST Res...

Page 30: ...Pinout Pin No Signal Pin No Signal 1 N C 2 N C 3 GND 4 PCI_INTA 5 PCI_INTB 6 PCI_INTC 7 Present 8 5V 9 PCI_INTD 10 N C 11 GND 12 N C 13 PCI_CLK 14 GND 15 GND 16 PCI_GNT1 17 PCI_REQ1 18 5V 19 N C 20 PC...

Page 31: ...16 N C 17 PCI_PME 18 GND 19 PCI_AD30 20 PCI_AD29 21 GND 22 PCI_AD26 23 PCI_AD18 24 3 3V 25 PCI_IDSEL 26 PCI_AD23 27 3 3V 28 PCI_AD20 29 PCI_AD18 30 GND 31 PCI_AD16 32 PCI_C BE2 33 GND 34 N C 35 PCI_TR...

Page 32: ...I_AD61 14 GND 15 GND 16 PCI_AD60 17 PCI_AD59 18 PCI_AD58 19 PCI_AD57 20 GND 21 N C 22 PCI_AD56 23 PCI_AD55 24 PCI_AD54 25 PCI_AD53 26 GND 27 GND 28 PCI_AD52 29 PCI_AD51 30 PCI_AD50 31 PCI_AD49 32 GND...

Page 33: ...12 GND 13 TRD0 1M 14 TRD2 1M 15 TRD0 1M 16 TRD2 1M 17 GND 18 GND 19 TRD1 1M 20 TRD3 1M 21 TRD1 1M 22 TRD3 1M 23 GND 24 GND 25 GND 26 GND 27 U0TX C 28 U1TX C 29 U0RX C 30 U1RX C 31 GND 32 GND 33 SCL 34...

Page 34: ...XPMC 6710 Reference Manual Serial Port Connector J2 Mini USB Figure 1 8 Serial Port Mini USB Connector J2 Table 1 6 Serial Port Connector J2 Mini USB Pinout Pin No Signal 1 N C 2 Serial 0 TX 3 Serial...

Page 35: ...red Jack 45 the RJ 45 is an eight wire connector used commonly to connect computers onto a local area networks LAN especially Ethernet RJ 45 connectors look similar to the ubiquitous RJ 11 connectors...

Page 36: ...8 P5 JTAG Header Pinout Pin No Signal Pin No Signal 1 CPUTD0 2 COPQACK 3 CPUTD1 4 COPTRST 5 COPUP0 6 VDD_SENSE 7 CPUTCK 8 CKSTP_IN 9 CPUTMS 10 N C 11 COPSRESET 12 GND 13 COPHRESET 14 N C 15 CKSTP_OUT...

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