Xilinx Zynq UltraScale+ ZCU208, User Manual

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Table 3: Command List (cont'd)
Command Input Parameters Output Parameters Description
GetNyquistZone Type, Tile, Block Type, Tile, Block, NyquistZone Cf. PG269
GetOutputCurr Tile, Block Tile, Block, OutputCurr Cf. PG269
GetPLLConfig Type, Tile
Type, Tile, PLLSettings.Enabled, PLLSettings.RefClkFreq,
PLLSettings.SampleRate, PLLSettings.RefClkDivider,
PLLSettings.FeedbackDivider, PLLSettings.OutputDivider
Cf. PG269
GetPLLLockStatus Type, Tile Type, Tile, LockStatus Cf. PG269
GetQMCSettings Type, Tile, Block
Type, Tile, Block, QMC_Settings.GainCorrectionFactor,
QMC_Settings.PhaseCorrectionFactor, QMC_Settings.EnablePhase,
QMC_Settings.EnableGain, QMC_Settings.OffsetCorrectionFactor,
QMC_Settings.EventSource
Cf. PG269
GetThresholdSettings Tile, Block
Tile, Block, ThresholdSettings.UpdateThreshold,
ThresholdSettings.ThresholdMode[0], ThresholdSettings.ThresholdMode[1],
ThresholdSettings.ThresholdAvgVal[0], ThresholdSettings.ThresholdAvgVal[1],
ThresholdSettings.ThresholdUnderVal[0],
ThresholdSettings.ThresholdUnderVal[1],
ThresholdSettings.ThresholdOverVal[0],
ThresholdSettings.ThresholdOverVal[1]
Cf. PG269
GetSignalDetector Tile, Block
Tile, Block, Mode, TimeConstant, Flush, EnableIntegrator, Threshold,
ThreshOnTriggerCnt, ThreshOffTriggerCnt, HysteresisEnable
Cf. PG269
GetDACPower Board_id, Tile Board_id, Tile, value_1, value_2, value_3, value_4, value_5 Cf. PG269
IntrClr Type, Tile, Block, IntrMask None Cf. PG269
IntrDisable Type, Tile, Block, IntrMask None Cf. PG269
IntrEnable Type, Tile, Block, IntrMask None Cf. PG269
MTS_Sysref_Config Enable, dac_tiles, adc_tiles
DAC_Sync_Config.Target_Latency, DAC_Sync_Config.Offset[Tile],
DAC_Sync_Config.Latency[Tile], DAC_Sync_Config.Marker_Delay,
DAC_Sync_Config.SysRef_Enable, ADC_Sync_Config.Target_Latency,
ADC_Sync_Config.Offset[Tile], ADC_Sync_Config.Latency[Tile],
ADC_Sync_Config.Marker_Delay, ADC_Sync_Config.SysRef_Enable
Cf. PG269
MultiConverter_Init Type, Tile_ref None Cf. PG269
MultiConverter_Sync
Type, ADC_Sync_Config.Target_Latency/
DAC_Sync_Config.Target_Latency, Tile
Sync_config.Target_Latency, Sync_config.Offset[Tile], Sync_config.Latency[Tile],
Sync_config.Marker_Delay, Sync_config.SysRef_Enable
Cf. PG269
Reset Type, Tile None Cf. PG269
ResetNCOPhase Type, Tile, Block None Cf. PG269
RF_ReadReg16 Offset Value Cf. PG269
RF_ReadReg32 Offset Value Cf. PG269
RF_WriteReg16 Offset, Value None Cf. PG269
RF_WriteReg32 Offset, Value None Cf. PG269
SetCalFreeze
Tile, Block,
CalFreezePtr.FreezeCalibration,
CalFreezePtr.DisableFreezePin
None Cf. PG269
SetCalibrationMode Tile, Block, Calibration Mode None Cf. PG269
Appendix B: Command List
UG1433 (v1.2) October 27, 2021 www.xilinx.com
RF Data Converter Evaluation Tool User Guide 29
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