Xilinx Virtex-II Pro, User Manual, Page: 25 / 30

Virtex-II Pro Prototype Platform User Guide www.xilinx.com 25
UG027 / PN 0402044 (v1.6) October 25, 2002 1-800-255-7778
User Programmable Pins
R
21. CPU Trace Pins
Figure 1-7 shows the location of the CPU trace pins on the trace connector.
Table 1-13 shows the CPU trace pin locations for the available DUT package types.
For details on CPU debug pins, , refer to Appendix A, “RISCWatch and RISCTrace
Interfaces.”
Figure 1-7: CPU Trace Connector, 20-Pin Male
Table 1-13: RISC Trace Pins
Pin FG456 FF672 FF1152
TS5 V22 AB24 AE34
TS3 V21 AC25 AF33
TS1E V20 AD25 AF32
TS10 V19 AC24 AL33
TS6 W21 AB23 AD34
TS4 Y22 AC26 AE33
TS2E Y21 AD26 AG33
TS20 AA22 AE26 AK31
TRC_CLK AB21 AD23 AL34
UG027_07_030402
1 3 5 7 9 11 13 15 17 19
2 4 6 8 10 12 14 16 18 20
NC
TS6
TS4
TS2E
TS20
NC
TRC_CLK
NC
NC
NC
TS10
TS1E
TS3
TS5
GND
NC
NC
NC
NC
NC