Xilinx Spartan-3A DSP FPGA Series, Technical Reference Manual

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Hardware overview
21
24. I
2
C fan controller and temperature/voltage monitor
Onboard temperature and voltage monitoring and control are handled by an Analog Devices ADT7476A
device. This device is controlled through I
2
C (see
I
2
C bus addressing
for details) and can:
•
Measure the voltage of the 5-V, 3.3-V, 1.8-V, and 1.0-V supplies
•
Measure the FPGA temperature through the DXP/DXN pins on the FPGA
•
Measure ambient temperature
•
Read power good status signals from the 2.5-V linear regulators
•
Provide PWM control of the fan speed
•
Provide fan tachometer readings
•
Generate interrupts/alarms based on readings
Connector P3 is a keyed three-pin fan header similar to the ones in computers. It is designed to support a 5-V
DC fan. To bypass the fan controller device and operate the fan at full speed, you can use connector JP9.
Under high-power operating conditions, a heatsink and/or fan for the FPGA can be accommodated on the
board (
e.g.
, Calgreg Electronics Smart-CLIP family of heatsink/fan assemblies). The XtremeDSP Spartan-3A
DSP Development Board does not come with a heatsink and/or fan.
25. LCD
Hantronix HDM16216L-2-L30S, 16-character × 2-line resolution LCD to display text information. The data
interface to the LCD is connected to the FPGA and supports only the 4-bit mode. Onboard level shifters are
used to shift the voltage level between the FPGA and the LCD. The LCD is equipped with a connector that
allows the LCD to be removed from the development board to gain access to the composnents below.
Turning the potentiometer located below the LCD with a screwdriver allows you to adjust the image contrast
of the LCD. The LCD is equipped with a backlight that can be turned off by removing jumper JP10.
Note
Take care not to scratch or otherwise damage the LCD.
26. JTAG header
The JTAG header (P5) allows programming devices and troubleshooting the FPGA. The JTAG port supports
the Xilinx Parallel Cable III, Parallel Cable IV, or Platform USB cable products. Third-party configuration
products might also be available. The JTAG chain can also be extended to the FMC expansion module when
it is present. See
Configuration options
for details.
27. User-defined buttons
The functions of the five user-defined buttons are entirely up to you. The buttons are directly connected to the
FPGA.
Table 10 User-defined button FPGA pin assignments
Button no. FPGA pin Description
S4 N25 GPIO_SW_NORTH
S5 N26 GPIO_SW_WEST
S6 Y26 GPIO_SW_CENTER
S7 N23 GPIO_SW_EAST
S8 P21 GPIO_SW_SOUTH